Wireless System and Circuit Design Space in Modern Digital CMOS Technology

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

Among all available processes, GaAs process has better speed footprint when compared to standard CMOS digital technology. The former presents charge carriers with greater mobility and saturation velocity, v sat , thus pushing the f T to more than 250 GHz [14]. Considering comparable generations (technology nodes), CMOS has a lower f T , lower g m and lower driving capabilities. Nevertheless, CMOS has lower cost since it is fabricated from silicon and has a less demanding fabrication process requiring a minimum number of masks. Moreover, the mobility of the PMOS transistor is much higher when compared to an equivalent GaAs structure, which enables the implementation of efficient and complementary digital gates, thus reducing drastically static power consumption.
Original languageUnknown
Title of host publicationParametric Analog Signal Amplification Applied to Nanoscale CMOS Technologies
Place of PublicationUS
PublisherSpringer
Pages1-32
ISBN (Print)978-1-4614-1670-8/978-1-4614-1671-5
Publication statusPublished - 1 Jan 2012

Cite this

Oliveira, J. P. A. D., Goes, J. C. D. P., & DEE Group Author (2012). Wireless System and Circuit Design Space in Modern Digital CMOS Technology. In Parametric Analog Signal Amplification Applied to Nanoscale CMOS Technologies (pp. 1-32). US: Springer.