Using reconciliation model for calculation of harmonics in a MOS transistor stage operating in moderate inversion

I. M. Filanovsky, L. B. Oliveira

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Abstract

The paper describes calculation of the first, second and third harmonics of the output voltage in a MOS transistor stage operating in moderate inversion (common source stage is taken as an example). The dependence of drain current on the gate-source voltage is approximated on the basis of reconciliation model proposed by Y. Tsividis and using the term corresponding to saturation operation. Then, the definition of moderate inversion is introduced considering a special series expansion for the function ln2(x). To simplify the calculations we consider the first two terms only for this expansion. Then the harmonic coefficients are obtained by routine calculations. The results of calculations were verified by simulations. The results are in a reasonable agreement; in particular, the presence of the zero value for the third harmonic is confirmed both in calculations and simulations.

Original languageEnglish
Pages474-477
Number of pages4
DOIs
Publication statusPublished - 2016
Event2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
Duration: 22 May 201625 May 2016

Conference

Conference2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
CountryCanada
CityMontreal
Period22/05/1625/05/16

Fingerprint

MOSFET devices
Drain current
Electric potential

Keywords

  • common source stage
  • distortions
  • moderate inversion
  • MOS transistor model
  • output voltage harmonics

Cite this

Filanovsky, I. M., & Oliveira, L. B. (2016). Using reconciliation model for calculation of harmonics in a MOS transistor stage operating in moderate inversion. 474-477. Paper presented at 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, Canada. https://doi.org/10.1109/ISCAS.2016.7527280
Filanovsky, I. M. ; Oliveira, L. B. / Using reconciliation model for calculation of harmonics in a MOS transistor stage operating in moderate inversion. Paper presented at 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, Canada.4 p.
@conference{368024d3956947b7a679b99b46e3ddbd,
title = "Using reconciliation model for calculation of harmonics in a MOS transistor stage operating in moderate inversion",
abstract = "The paper describes calculation of the first, second and third harmonics of the output voltage in a MOS transistor stage operating in moderate inversion (common source stage is taken as an example). The dependence of drain current on the gate-source voltage is approximated on the basis of reconciliation model proposed by Y. Tsividis and using the term corresponding to saturation operation. Then, the definition of moderate inversion is introduced considering a special series expansion for the function ln2(x). To simplify the calculations we consider the first two terms only for this expansion. Then the harmonic coefficients are obtained by routine calculations. The results of calculations were verified by simulations. The results are in a reasonable agreement; in particular, the presence of the zero value for the third harmonic is confirmed both in calculations and simulations.",
keywords = "common source stage, distortions, moderate inversion, MOS transistor model, output voltage harmonics",
author = "Filanovsky, {I. M.} and Oliveira, {L. B.}",
note = "Sem PDF.; 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 ; Conference date: 22-05-2016 Through 25-05-2016",
year = "2016",
doi = "10.1109/ISCAS.2016.7527280",
language = "English",
pages = "474--477",

}

Filanovsky, IM & Oliveira, LB 2016, 'Using reconciliation model for calculation of harmonics in a MOS transistor stage operating in moderate inversion' Paper presented at 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, Canada, 22/05/16 - 25/05/16, pp. 474-477. https://doi.org/10.1109/ISCAS.2016.7527280

Using reconciliation model for calculation of harmonics in a MOS transistor stage operating in moderate inversion. / Filanovsky, I. M.; Oliveira, L. B.

2016. 474-477 Paper presented at 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, Canada.

Research output: Contribution to conferencePaper

TY - CONF

T1 - Using reconciliation model for calculation of harmonics in a MOS transistor stage operating in moderate inversion

AU - Filanovsky, I. M.

AU - Oliveira, L. B.

N1 - Sem PDF.

PY - 2016

Y1 - 2016

N2 - The paper describes calculation of the first, second and third harmonics of the output voltage in a MOS transistor stage operating in moderate inversion (common source stage is taken as an example). The dependence of drain current on the gate-source voltage is approximated on the basis of reconciliation model proposed by Y. Tsividis and using the term corresponding to saturation operation. Then, the definition of moderate inversion is introduced considering a special series expansion for the function ln2(x). To simplify the calculations we consider the first two terms only for this expansion. Then the harmonic coefficients are obtained by routine calculations. The results of calculations were verified by simulations. The results are in a reasonable agreement; in particular, the presence of the zero value for the third harmonic is confirmed both in calculations and simulations.

AB - The paper describes calculation of the first, second and third harmonics of the output voltage in a MOS transistor stage operating in moderate inversion (common source stage is taken as an example). The dependence of drain current on the gate-source voltage is approximated on the basis of reconciliation model proposed by Y. Tsividis and using the term corresponding to saturation operation. Then, the definition of moderate inversion is introduced considering a special series expansion for the function ln2(x). To simplify the calculations we consider the first two terms only for this expansion. Then the harmonic coefficients are obtained by routine calculations. The results of calculations were verified by simulations. The results are in a reasonable agreement; in particular, the presence of the zero value for the third harmonic is confirmed both in calculations and simulations.

KW - common source stage

KW - distortions

KW - moderate inversion

KW - MOS transistor model

KW - output voltage harmonics

UR - http://www.scopus.com/inward/record.url?scp=84983437441&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2016.7527280

DO - 10.1109/ISCAS.2016.7527280

M3 - Paper

SP - 474

EP - 477

ER -

Filanovsky IM, Oliveira LB. Using reconciliation model for calculation of harmonics in a MOS transistor stage operating in moderate inversion. 2016. Paper presented at 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, Canada. https://doi.org/10.1109/ISCAS.2016.7527280