Towards the improvement of the stability of a-Si:H pin devices

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This paper deals with a new process to improve the stability of a-Si:H pin solar cells deposited in a single batch process by proper passivation of the interfaces. The process consists in removing partially a deposited sacrificial oxide layer grown between the p/i or i/n interfaces by SF6 etching. This layer is an absorber of defects and impurities that are introduced in the interfaces, mainly from the chamber walls and the substrate surface. The results achieved in laboratory samples lead to devices in which the fill factor and short circuit current density were improved respectively towards 75% and 16.5 mA cm-2, with a final working efficiency of about 9.5%.
Original languageEnglish
Pages (from-to)257-262
Number of pages6
JournalSolar Energy
Issue numberSUPPLEMENT
Publication statusPublished - 1 Dec 2000


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