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Testing patterns for software transactional memory engines

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

The emergence of multi-core processors is promoting the use of concurrency and multithreading. To raise the abstraction level of synchronization constructs is fundamental to ease the development of concurrent software, and Software Transactional Memory (STM) is a good approach towards such goal. However, execution environment issues such as the processor instruction set, caching policy, and memory model, may have strong influence upon the reliability of STM engines. This paper addresses the testing of STM engines aiming at improving their reliability and independence from execution environment. From our experience with porting and extending a specific STM engine, we report on some of the bugs found and synthesize some testing patterns that proved to be useful at testing STM engines.

Original languageEnglish
Title of host publicationProceedings of the 2007 ACM Workshop on Parallel and Distributed Systems
Subtitle of host publicationTesting and Debugging, PADTAD'07
Place of PublicationNew York
PublisherACM - Association for Computing Machinery
Pages36-42
Number of pages7
ISBN (Print)159593748X, 9781595937483
DOIs
Publication statusPublished - 2007
Event2007 ACM International Symposium on Software Testing and Analysis, ISSTA'07 and PADTAD-V Workshop - London, United Kingdom
Duration: 9 Jul 2007 → 12 Jul 2007

Publication series

NameProceedings of the 2007 ACM Workshop on Parallel and Distributed Systems: Testing and Debugging, PADTAD'07

Conference

Conference2007 ACM International Symposium on Software Testing and Analysis, ISSTA'07 and PADTAD-V Workshop
Country/TerritoryUnited Kingdom
CityLondon
Period9/07/07 → 12/07/07

Keywords

  • Concurrency
  • Debugging
  • Software transactional memory
  • Testing
  • Testing patterns

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