Switched-capacitor circuits using a single-phase scheme

João Goes, Bruno Vaz, Nuno Paulino, H. Pinto, Rui Monteiro, Adolfo Sanchez Steiger-garção

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Citations (Scopus)

Abstract

A novel single phase scheme to be used in switchedcapacitor (SC) circuits is described. The signal integrity is preserved by exploring the gap between the high conductance region of PMOS and NMOS switches at low power-supply voltages and the fast clock transitions that exist in advanced CMOS technologies. In order to illustrate the attractiveness of the proposed scheme two practical circuit examples are presented. Electrical simulated results of a low-voltage 2nd-order ΣΔ modulator clearly demonstrate the improvements in terms of harmonic distortion that can be achieved using this technique.

Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems (ISCAS)
Subtitle of host publicationMay 23-26, 2005, International Conference Center, Kobe, Japan : conference proceedings
Place of PublicationPiscataway
PublisherIEEE
Pages3123-3126
Number of pages4
Volume4
ISBN (Print)0-7803-8834-8
DOIs
Publication statusPublished - 2005
EventIEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan
Duration: 23 May 200526 May 2005

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310
ISSN (Electronic)2158-1525

Conference

ConferenceIEEE International Symposium on Circuits and Systems 2005, ISCAS 2005
CountryJapan
CityKobe
Period23/05/0526/05/05

Keywords

  • Switched capacitor circuits
  • Switches
  • Switching circuits
  • MOS devices
  • Sampling methods
  • Clocks
  • CMOS technology
  • Circuit simulation
  • Harmonic distortion
  • Low voltage

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