Single-Stage OTA biased by Voltage-Combiners with Enhanced Performance using Current Starving

R. Povoa; N. Lourenco; R. Martins; A. Canelas; N. Horta; J. Goes

doi:10.1109/TCSII.2017.2777533

Single-Stage OTA biased by Voltage-Combiners with Enhanced Performance using Current Starving

R. Povoa, N. Lourenco, R. Martins, A. Canelas, N. Horta, J. Goes

Research output: Contribution to journal › Article › peer-review

13 Citations (Scopus)

Abstract

This paper presents an improved single-stage amplifier biased by voltage-combiners, through the proper usage of current starving. The topology designed and fabricated shows an enhancement of the low-frequency gain; an improvement in the establishing time due to enhanced gain-bandwidth product; and a high improvement of the energy-efficiency. The circuit was optimized using AIDA-C, a state-of-the-art multi-objective multi-constraint analog IC sizing and optimization tool, and simulation results demonstrate that a gain above 60 dB and a figure-of-merit over 900 MHz×pF/mA are acquirable with this circuit, using the UMC 130 nm technology design kit. The circuit was fabricated and experimentally measured, presenting a gain of 58 dB with a figure-of-merit of 1102 MHz×pF/mA, for a 3.3 V supply source.

Original language	English
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
DOIs	https://doi.org/10.1109/TCSII.2017.2777533
Publication status	Accepted/In press - 23 Nov 2017

Keywords

Amplifier
Circuits and systems
Current Starving
Energy efficiency
Energy-Efficiency
Feeds
Gain
Gain Enhancement.
Optimization
OTA
Simulation
Single-Stage
Topology
Voltage-Combiners

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/TCSII.2017.2777533

Cite this

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title = "Single-Stage OTA biased by Voltage-Combiners with Enhanced Performance using Current Starving",

abstract = "This paper presents an improved single-stage amplifier biased by voltage-combiners, through the proper usage of current starving. The topology designed and fabricated shows an enhancement of the low-frequency gain; an improvement in the establishing time due to enhanced gain-bandwidth product; and a high improvement of the energy-efficiency. The circuit was optimized using AIDA-C, a state-of-the-art multi-objective multi-constraint analog IC sizing and optimization tool, and simulation results demonstrate that a gain above 60 dB and a figure-of-merit over 900 MHz×pF/mA are acquirable with this circuit, using the UMC 130 nm technology design kit. The circuit was fabricated and experimentally measured, presenting a gain of 58 dB with a figure-of-merit of 1102 MHz×pF/mA, for a 3.3 V supply source.",

keywords = "Amplifier, Circuits and systems, Current Starving, Energy efficiency, Energy-Efficiency, Feeds, Gain, Gain Enhancement., Optimization, OTA, Simulation, Single-Stage, Topology, Voltage-Combiners",

author = "R. Povoa and N. Lourenco and R. Martins and A. Canelas and N. Horta and J. Goes",

year = "2017",

month = nov,

day = "23",

doi = "10.1109/TCSII.2017.2777533",

language = "English",

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TY - JOUR

T1 - Single-Stage OTA biased by Voltage-Combiners with Enhanced Performance using Current Starving

AU - Povoa, R.

AU - Lourenco, N.

AU - Martins, R.

AU - Canelas, A.

AU - Horta, N.

AU - Goes, J.

PY - 2017/11/23

Y1 - 2017/11/23

N2 - This paper presents an improved single-stage amplifier biased by voltage-combiners, through the proper usage of current starving. The topology designed and fabricated shows an enhancement of the low-frequency gain; an improvement in the establishing time due to enhanced gain-bandwidth product; and a high improvement of the energy-efficiency. The circuit was optimized using AIDA-C, a state-of-the-art multi-objective multi-constraint analog IC sizing and optimization tool, and simulation results demonstrate that a gain above 60 dB and a figure-of-merit over 900 MHz×pF/mA are acquirable with this circuit, using the UMC 130 nm technology design kit. The circuit was fabricated and experimentally measured, presenting a gain of 58 dB with a figure-of-merit of 1102 MHz×pF/mA, for a 3.3 V supply source.

AB - This paper presents an improved single-stage amplifier biased by voltage-combiners, through the proper usage of current starving. The topology designed and fabricated shows an enhancement of the low-frequency gain; an improvement in the establishing time due to enhanced gain-bandwidth product; and a high improvement of the energy-efficiency. The circuit was optimized using AIDA-C, a state-of-the-art multi-objective multi-constraint analog IC sizing and optimization tool, and simulation results demonstrate that a gain above 60 dB and a figure-of-merit over 900 MHz×pF/mA are acquirable with this circuit, using the UMC 130 nm technology design kit. The circuit was fabricated and experimentally measured, presenting a gain of 58 dB with a figure-of-merit of 1102 MHz×pF/mA, for a 3.3 V supply source.

KW - Amplifier

KW - Circuits and systems

KW - Current Starving

KW - Energy efficiency

KW - Energy-Efficiency

KW - Feeds

KW - Gain

KW - Gain Enhancement.

KW - Optimization

KW - OTA

KW - Simulation

KW - Single-Stage

KW - Topology

KW - Voltage-Combiners

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DO - 10.1109/TCSII.2017.2777533

M3 - Article

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JO - IEEE Transactions on Circuits and Systems II: Express Briefs

JF - IEEE Transactions on Circuits and Systems II: Express Briefs

SN - 1549-7747

ER -

Single-Stage OTA biased by Voltage-Combiners with Enhanced Performance using Current Starving

Abstract

Keywords

UN SDGs

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