This paper presents the design of single-stage amplifiers with enhanced DC gain without the need of using any cascode devices or any positive-feedback or feed-forward techniques. Instead, two voltage-combiners are used in replacement of the traditional tail current-source that is normally employed to bias the differential-pair. Simulation results of a properly optimized circuit example, using AIDA-C a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that DC gains above 50 dB can be achieved, together with high energy efficiency (a figure-of-merit of about 1300 MHz-pF/mA has been achieved).
|Title of host publication||-|
|Publication status||Published - 1 Jan 2013|
|Event||21st International Conference on Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE - |
Duration: 1 Jan 2013 → …
|Conference||21st International Conference on Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE|
|Period||1/01/13 → …|