Predictive Integrators with Thermal Noise Cancellation

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Abstract

This paper proposes a simple thermal noise cancellation technique to effectively reduce the output noise in predictive integrators. By combining a low-gain two-stage amplifier and a small auxiliary noise-cancelling capacitor, the output noise is highly attenuated. Simulation results for a classic Nagaraj-Ki predictive integrator, considering real MOS switches, demonstrate that the output thermal noise can be reduced up to 87%.
Original languageEnglish
Title of host publicationISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings
Place of PublicationNew Jersey
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages4
ISBN (Electronic)978-1-6654-5109-3
ISBN (Print)978-1-6654-5110-9
DOIs
Publication statusPublished - 2023
Event56th IEEE International Symposium on Circuits and Systems, ISCAS 2023 - Monterey, United States
Duration: 21 May 202325 May 2023

Publication series

NameIEEE International Symposium on Circuits and Systems (ISCAS)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Volume2023-May
ISSN (Print)0271-4310
ISSN (Electronic)2158-1525

Conference

Conference56th IEEE International Symposium on Circuits and Systems, ISCAS 2023
Country/TerritoryUnited States
CityMonterey
Period21/05/2325/05/23

Keywords

  • Correlated-double-sampling
  • Integrator
  • Noise Cancellation
  • Predictive-Integrators
  • Switched-Capacitor
  • Thermal Noise

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