The improved characteristics of Tunnel FETs (TFETs) like steep sub-threshold swing and low off-currents make them an attractive choice for low power operations compared to MOSFETs and Multi-gate FETs like FINFETs. Such characteristics are favorable to digital design, but the drain current saturation in their output characteristics can also benefit the analog design. In this paper, it is shown by simulations that analog characteristics as voltage gain, power consumption and bandwidth are improved using TFETs compared to their counterparts, at a sub-22 nm technology node and 0.8 V supply voltage.
|Title of host publication||Proceedings of the XVIII Conference on the Design of Circuits and Integrated Systems Donostia - San Sebastián, Nov. 2013|
|Publication status||Published - 1 Jan 2014|
|Event||XVIII Conference on the Design of Circuits and Integrated Systems - |
Duration: 1 Jan 2013 → …
|Conference||XVIII Conference on the Design of Circuits and Integrated Systems|
|Period||1/01/13 → …|