TY - PAT
T1 - P-type oxide alloys based on copper oxides, tin oxides, tin-copper alloy oxides and metal alloy thereof, and nickel oxide, with embedded metals thereof, fabrication process and use thereof
AU - Barquinha, Pedro Miguel Cândido
AU - Martins, Rodrigo Ferrão de Paiva
AU - Fortunato, Elvira Maria Correia
AU - Barros, Raquel
AU - Correia, Nuno Filipe de Oliveira
AU - Figueiredo, Vitor Manuel Loureiro
AU - Park, Sang Hee Ko
AU - Hwang, Chi Sun
PY - 2011/10/13
Y1 - 2011/10/13
N2 - The present invention relates to thin films comprising non- stoichiometric monoxides of: copper (OCu2)x with embedded cubic metal copper (Cucy) [ (OCu2) x+ (Cu1-2) y, wherein 0.05=xax with embedded metal tin (Snßx) [ (OSn) z+ (Sn1-2)w wherein 0.05cx-Snßx alloys with embedded metal Sn and Cu [ (O-Cu- Sn) a+ (Cua-Snß)b with 0x with embedded Ni and Sn species [ (O-Ni )a+ (Nia-Snß)b with 0<a<2 and 0<ß<2, wherein 0.05=a<1 and 0.01=b=0.9]; or combinations thereof, with amorphous, or nanocrystalline, or polycrystalline structure, either doped or not, with impurities such as zirconium, nitrogen or fluorine, for the fabrication of CMOS or TFT devices, with active matrices for LCD or OLED, fabrication of logic circuits, among others, using rigid or flexible substrates, wherein a protection layer, such as SU8 or the like, or silicon oxide or silicon nitride films are used for encapsulation.
AB - The present invention relates to thin films comprising non- stoichiometric monoxides of: copper (OCu2)x with embedded cubic metal copper (Cucy) [ (OCu2) x+ (Cu1-2) y, wherein 0.05=xax with embedded metal tin (Snßx) [ (OSn) z+ (Sn1-2)w wherein 0.05cx-Snßx alloys with embedded metal Sn and Cu [ (O-Cu- Sn) a+ (Cua-Snß)b with 0x with embedded Ni and Sn species [ (O-Ni )a+ (Nia-Snß)b with 0<a<2 and 0<ß<2, wherein 0.05=a<1 and 0.01=b=0.9]; or combinations thereof, with amorphous, or nanocrystalline, or polycrystalline structure, either doped or not, with impurities such as zirconium, nitrogen or fluorine, for the fabrication of CMOS or TFT devices, with active matrices for LCD or OLED, fabrication of logic circuits, among others, using rigid or flexible substrates, wherein a protection layer, such as SU8 or the like, or silicon oxide or silicon nitride films are used for encapsulation.
M3 - International PCT application
M1 - WO2011125036
Y2 - 2011/04/06
PB - World Intellectual Property Organization (WIPO)
ER -