The need for implementing low cost, fully integrated RF wireless transceivers has motivated the widespread use CMOS technology. However, in the particular case for voltage-controlled oscillators (VCO) where ever more stringent specifications in terms of phase-noise must be attained, the design of the on-chip LC tank is a challenging task, where fully advantage of the actual technologies characteristics must be pushed to nearly its limits. To overcome phase-noise limitations arising from the low quality factor of integrated inductors, optimization design methodologies are usually used. In this paper a model-based optimization approach is proposed. In this work the characterization of the oscillator behaviour is guaranteed by a set of analytical models describing each circuit element performance. A set of working examples for UMC130 technology, aiming the minimization of both VCO phase noise and power consumption, is addressed. The results presented, illustrate the potential of a GA optimization procedure design methodology yielding accurate and timely efficient oscillator designs. The validity of the results is checked against HSPICE/RF simulations.