Abstract
This work deals with the multi-objective optimization of analog circuits by generating the Pareto front where elements are low sensitive to parameters{\textquoteright} variations. NSGA-II is used for obtaining the non-dominated solutions. Richardson extrapolation technique is used for the in-loop optimization approach for computing partial derivatives and, thus, the solutions{\textquoteright} sensitivity. NSGA-II Pareto fronts{\textquoteright} intrinsic ranking is exploited for the generation of the new {\textquoteleft}low-sensitive{\textquoteright} Pareto front. The case of the optimal sizing of a CMOS voltage follower is considered to exemplify the proposed approach.
Original language | Unknown |
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Title of host publication | n/a |
Place of Publication | Istanbul, Turkey |
Pages | 1-4 |
DOIs | |
Publication status | Published - 1 Jan 2015 |
Event | International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) - Duration: 1 Jan 2015 → … |
Conference
Conference | International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) |
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Period | 1/01/15 → … |