Ferroelectric and high dielectric permittivity films are currently being investigated in view of their use as gate dielectrics in MIS structures. Along with the suppression of tunnelling currents at small gate thickness, they provide a memory function to MIS structures, which can be used in non-volatile memory applications. In this work we report fabrication and characterization of novel metal-ferroelectric-amorphous silicon structures. The structures consist of glass/ITO substrates coated with PZT 20/80 films (sol-gel) followed by an active layer (i-a-SiC:H, deposited by plasma enhanced chemical vapor deposition (PECVD)). A strong capacitance hysteresis is observed in C-V curves in electron accumulation region (VG > 0), accompanied with a large increase in the capacitance of ferroelectric-semiconductor structures at low frequencies. Threshold voltage for electron accumulation is about 10 V being dependent on the ferroelectric polarization switching.