Low voltage low power fully differential self-biased 1.5-bit quantizer with built-in thresholds

M. Figueiredo; J. Goes; L. B. Oliveira; A. Steiger-Garção

doi:10.1002/cta.750

Low voltage low power fully differential self-biased 1.5-bit quantizer with built-in thresholds

M. Figueiredo, J. Goes, L. B. Oliveira, A. Steiger-Garção

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

A new fully differential self-biased 1.5-bit flash quantizer with built-in threshold voltages, suitable for high speed ADCs and low voltage operation, is described. The proposed circuit is very simple, and simulation results in a 65 nm standard CMOS technology demonstrate that, following the suggested design methodology, it is able to achieve low offset, low kickback noise, low metastability probability errors and fast regeneration time with very low power dissipation.

Original language	English
Pages (from-to)	681-691
Number of pages	11
Journal	International Journal of Circuit Theory and Applications
Volume	40
Issue number	7
DOIs	https://doi.org/10.1002/cta.750
Publication status	Published - 1 Jul 2012

Keywords

ADC
Built-in
Flash quantizer
Inverters
Low voltage
Self-biased

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10.1002/cta.750Licence: CC BY-NC

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title = "Low voltage low power fully differential self-biased 1.5-bit quantizer with built-in thresholds",

abstract = "A new fully differential self-biased 1.5-bit flash quantizer with built-in threshold voltages, suitable for high speed ADCs and low voltage operation, is described. The proposed circuit is very simple, and simulation results in a 65 nm standard CMOS technology demonstrate that, following the suggested design methodology, it is able to achieve low offset, low kickback noise, low metastability probability errors and fast regeneration time with very low power dissipation.",

keywords = "ADC, Built-in, Flash quantizer, Inverters, Low voltage, Self-biased",

author = "M. Figueiredo and J. Goes and Oliveira, {L. B.} and A. Steiger-Gar{\c c}{\~a}o",

note = "The authors thank Prof. M. Medeiros Silva for his many suggestions that highly improved the quality of this paper. This work has been partially supported by the Portuguese Foundation for Science and Technology (FCT) through projects SPEED (PTDC/EEAELC/66857/2006) and LEADER (PTDC/EEA-ELC/69791/2006), and PhD grant BD/41524/2007.",

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AU - Goes, J.

AU - Oliveira, L. B.

AU - Steiger-Garção, A.

N1 - The authors thank Prof. M. Medeiros Silva for his many suggestions that highly improved the quality of this paper. This work has been partially supported by the Portuguese Foundation for Science and Technology (FCT) through projects SPEED (PTDC/EEAELC/66857/2006) and LEADER (PTDC/EEA-ELC/69791/2006), and PhD grant BD/41524/2007.

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N2 - A new fully differential self-biased 1.5-bit flash quantizer with built-in threshold voltages, suitable for high speed ADCs and low voltage operation, is described. The proposed circuit is very simple, and simulation results in a 65 nm standard CMOS technology demonstrate that, following the suggested design methodology, it is able to achieve low offset, low kickback noise, low metastability probability errors and fast regeneration time with very low power dissipation.

AB - A new fully differential self-biased 1.5-bit flash quantizer with built-in threshold voltages, suitable for high speed ADCs and low voltage operation, is described. The proposed circuit is very simple, and simulation results in a 65 nm standard CMOS technology demonstrate that, following the suggested design methodology, it is able to achieve low offset, low kickback noise, low metastability probability errors and fast regeneration time with very low power dissipation.

KW - ADC

KW - Built-in

KW - Flash quantizer

KW - Inverters

KW - Low voltage

KW - Self-biased

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Low voltage low power fully differential self-biased 1.5-bit quantizer with built-in thresholds

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Keywords

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