Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation

Guiomar Evans; João Carlos da Palma Goes; Adolfo Sanchez Steiger-garção; Manuel Duarte Ortigueira; Nuno Filipe Silva Veríssimo Paulino; J. Sousa Lopes

doi:10.1109/ISCAS.2003.1205521

Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation

Guiomar Evans, João Carlos da Palma Goes, Adolfo Sanchez Steiger-garção, Manuel Duarte Ortigueira, Nuno Filipe Silva Veríssimo Paulino, J. Sousa Lopes

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Citations (Scopus)

Abstract

A CMOS analogue circuit for Gaussian noise generation as well as a novel circuit for transforming Gaussian noise into uniform noise, both designed for operating with a supply voltage of 1.5V, are presented. Both circuits are optimized for a 0.35 μm standard CMOS technology using an equation-based design methodology based on genetic algorithms. Electrical simulations demonstrate that high noise amplitudes together with reasonable bandwidths can be achieved with relatively low power dissipation. Potential applications include self-calibration and on-chip self-testing of video-rate analogue-to-digital converters.

Original language	English
Title of host publication	Proceedings Of The 2003 IEEE International Symposium On Circuits And systems
Subtitle of host publication	Biomedical Circuits & Systems: VLSI Systems & Applications: Neural Networks & Systems
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	I145-I148
Number of pages	4
Volume	5
ISBN (Print)	0-7803-7761-3
DOIs	https://doi.org/10.1109/ISCAS.2003.1205521
Publication status	Published - 2003
Event	2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand Duration: 25 May 2003 → 28 May 2003

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Publisher	IEEE; 1999
ISSN (Print)	0271-4310

Conference

Conference	2003 IEEE International Symposium on Circuits and Systems
Country/Territory	Thailand
City	Bangkok
Period	25/05/03 → 28/05/03

Keywords

CMOS analog integrated circuits
Gaussian noise
Circuit noise
Noise generators
CMOS technology
Voltage
Design optimization
Equations
Design methodology
Genetic algorithms

Access to Document

10.1109/ISCAS.2003.1205521

http://hdl.handle.net/10362/2680

Cite this

Evans, G., Goes, J. C. D. P., Steiger-garção, A. S., Ortigueira, M. D., Paulino, N. F. S. V., & Lopes, J. S. (2003). Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation. In Proceedings Of The 2003 IEEE International Symposium On Circuits And systems: Biomedical Circuits & Systems: VLSI Systems & Applications: Neural Networks & Systems (Vol. 5, pp. I145-I148). (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/ISCAS.2003.1205521

Evans, Guiomar ; Goes, João Carlos da Palma ; Steiger-garção, Adolfo Sanchez et al. / Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation. Proceedings Of The 2003 IEEE International Symposium On Circuits And systems: Biomedical Circuits & Systems: VLSI Systems & Applications: Neural Networks & Systems. Vol. 5 Piscataway : Institute of Electrical and Electronics Engineers (IEEE), 2003. pp. I145-I148 (Proceedings - IEEE International Symposium on Circuits and Systems).

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title = "Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation",

abstract = "A CMOS analogue circuit for Gaussian noise generation as well as a novel circuit for transforming Gaussian noise into uniform noise, both designed for operating with a supply voltage of 1.5V, are presented. Both circuits are optimized for a 0.35 μm standard CMOS technology using an equation-based design methodology based on genetic algorithms. Electrical simulations demonstrate that high noise amplitudes together with reasonable bandwidths can be achieved with relatively low power dissipation. Potential applications include self-calibration and on-chip self-testing of video-rate analogue-to-digital converters.",

keywords = "CMOS analog integrated circuits, Gaussian noise, Circuit noise, Noise generators, CMOS technology, Voltage, Design optimization, Equations, Design methodology, Genetic algorithms",

author = "Guiomar Evans and Goes, \{Jo{\~a}o Carlos da Palma\} and Steiger-gar{\c c}{\~a}o, \{Adolfo Sanchez\} and Ortigueira, \{Manuel Duarte\} and Paulino, \{Nuno Filipe Silva Ver{\'i}ssimo\} and Lopes, \{J. Sousa\}",

year = "2003",

doi = "10.1109/ISCAS.2003.1205521",

language = "English",

isbn = "0-7803-7761-3",

volume = "5",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

pages = "I145--I148",

booktitle = "Proceedings Of The 2003 IEEE International Symposium On Circuits And systems",

address = "United States",

note = "2003 IEEE International Symposium on Circuits and Systems ; Conference date: 25-05-2003 Through 28-05-2003",

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Evans, G, Goes, JCDP , Steiger-garção, AS , Ortigueira, MD , Paulino, NFSV & Lopes, JS 2003, Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation. in Proceedings Of The 2003 IEEE International Symposium On Circuits And systems: Biomedical Circuits & Systems: VLSI Systems & Applications: Neural Networks & Systems. vol. 5, Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers (IEEE), Piscataway, pp. I145-I148, 2003 IEEE International Symposium on Circuits and Systems, Bangkok, Thailand, 25/05/03. https://doi.org/10.1109/ISCAS.2003.1205521

Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation. / Evans, Guiomar; Goes, João Carlos da Palma ; Steiger-garção, Adolfo Sanchez et al.
Proceedings Of The 2003 IEEE International Symposium On Circuits And systems: Biomedical Circuits & Systems: VLSI Systems & Applications: Neural Networks & Systems. Vol. 5 Piscataway: Institute of Electrical and Electronics Engineers (IEEE), 2003. p. I145-I148 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Evans, Guiomar

AU - Goes, João Carlos da Palma

AU - Steiger-garção, Adolfo Sanchez

AU - Ortigueira, Manuel Duarte

AU - Paulino, Nuno Filipe Silva Veríssimo

AU - Lopes, J. Sousa

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N2 - A CMOS analogue circuit for Gaussian noise generation as well as a novel circuit for transforming Gaussian noise into uniform noise, both designed for operating with a supply voltage of 1.5V, are presented. Both circuits are optimized for a 0.35 μm standard CMOS technology using an equation-based design methodology based on genetic algorithms. Electrical simulations demonstrate that high noise amplitudes together with reasonable bandwidths can be achieved with relatively low power dissipation. Potential applications include self-calibration and on-chip self-testing of video-rate analogue-to-digital converters.

AB - A CMOS analogue circuit for Gaussian noise generation as well as a novel circuit for transforming Gaussian noise into uniform noise, both designed for operating with a supply voltage of 1.5V, are presented. Both circuits are optimized for a 0.35 μm standard CMOS technology using an equation-based design methodology based on genetic algorithms. Electrical simulations demonstrate that high noise amplitudes together with reasonable bandwidths can be achieved with relatively low power dissipation. Potential applications include self-calibration and on-chip self-testing of video-rate analogue-to-digital converters.

KW - CMOS analog integrated circuits

KW - Gaussian noise

KW - Circuit noise

KW - Noise generators

KW - CMOS technology

KW - Voltage

KW - Design optimization

KW - Equations

KW - Design methodology

KW - Genetic algorithms

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M3 - Conference contribution

SN - 0-7803-7761-3

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T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - I145-I148

BT - Proceedings Of The 2003 IEEE International Symposium On Circuits And systems

PB - Institute of Electrical and Electronics Engineers (IEEE)

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Evans G, Goes JCDP , Steiger-garção AS , Ortigueira MD , Paulino NFSV, Lopes JS. Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation. In Proceedings Of The 2003 IEEE International Symposium On Circuits And systems: Biomedical Circuits & Systems: VLSI Systems & Applications: Neural Networks & Systems. Vol. 5. Piscataway: Institute of Electrical and Electronics Engineers (IEEE). 2003. p. I145-I148. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2003.1205521

Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation

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