@inproceedings{af90f955c231400aab29fde6cf2f3ae8,
title = "Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback",
abstract = "A low-power 1.2 V 6-bit 1-GS/s time-interleaved pipeline ADC designed in 130 nm CMOS is described. It is based on a new 2-channel 1.5-bit MDAC that performs open-loop residue amplification using a shared amplifier employing local-feedback. Time mismatches between channels are highly attenuated, simply by using two passive front-end Sample-and-Hold circuits, with dedicated switch-linearization control circuits, driven by a single clock phase. Simulated results of the ADC achieve 5.35-bit ENOB, with 20 mW and without requiring any gain control/calibration scheme.",
keywords = "Pipelines, Technical presentations, Amplifiers (electronic), Circuit theory, Linearization, Multicarrier modulation",
author = "A. Galhardo and Goes, {Jo{\~a}o Carlos da Palma} and Paulino, {Nuno Filipe Silva Ver{\'i}ssimo}",
year = "2008",
month = jan,
day = "1",
doi = "10.1109/ISCAS.2008.4541903",
language = "English",
isbn = "978-1-4244-1683-7",
volume = "1-10",
series = "Proceedings of 2008 Ieee International Symposium on Circuits and Systems, Vols 1-10",
publisher = "Institute of Electrical and Electronics Engineers (IEEE)",
pages = "2258--2261",
booktitle = "2008 IEEE International Symposium on Circuits and Systems",
address = "United States",
edition = "NA",
}