Low phase-noise temperature compensated self-biased ring oscillator

This paper proposes a very simple and innovative self-biasing (SB) scheme to be applied to classic fully-differential current starved (CS) ring oscillators. Using the proposed SB circuit, it is possible to reduce, simultaneously, phase-noise and temperature sensitivity of the oscillation frequency. Simulation results from a CS and from the new SB ring oscillator, both designed in a 65 nm 1.2V standard CMOS technology are presented, to validate and demonstrate the efficiency of the proposed new self-biasing scheme. These simulation results show an improvement of about 4 dB in phase-noise (at 1 MHz offset) and, at the same time, it has been verified that the oscillation frequency changes less than 0.71 % (less than 57 ppm/°C), in the temperature range ranging from -40 to 85 °C. Moreover, due to the low noise and low power design, the proposed new SB ring oscillator achieves a simulated figure-of-merit (FOM) of -163.5 dBc/Hz, which represents 8 dB improvement, accomplishing one of the best results when compared with the state-of-the art.