Increasing the efficiency of NOC routing algorithms based on fault tolerance measurement method

Increasing complexity of design and the need for separation of computing and communication areas in chips has directed the chip design techniques toward Network-On-Chip systems. NOC design is based on linking pre-designed cores and components in a System-on-Chip Environment. The main purpose is providing an effective infrastructure for communicating with desired resources. The complexity and the size of the networks in NOC increase the communication cost between components and possibility of unpredictable failures in components and communication circuits. Hence proposing fault tolerant algorithms is necessary in developing NOC architecture that is the motivation of this research work. This paper addresses limitations of current routing algorithms in fault tolerance. The proposed algorithm improves fault tolerance, reduces the delay in routing, and increases the reliability of NOC systems using fuzzy routing. The experimental results show a significant improvement in fault tolerance and reliability with a negligible hardware overhead.