In-cache MapReduce: Leverage Tiling to Boost Temporal Locality-Sensitive MapReduce Computations

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Abstract

The MapReduce framework is being increasingly used in the scientific computing and image/video processing fields. Relevant research has tailored it for the field's specificities but there are still overwhelming limitations when it comes to temporal locality-sensitive computations. The performance of this class of computations is closely tied to an efficient use of the memory hierarchy, concern that is not yet taken into consideration by the existing distributed MapReduce runtimes. Consequently, implementing temporal locality-sensitive computations, such as stencil algorithms, on top of MapReduce is a complex chore not rewarded with proportional dividends. This paper tackles both the complexity and the performance issues by integrating tiling techniques and memory hierarchy information into MapReduce's split stage. We prototyped our proposal atop the Apache Hadoop framework, and applied it to the context of stencil computations. Our experimental results reveal that, for a typical stencil computation, our prototype clearly outperforms Hadoop MapReduce, specially as the computation scales.
Original languageEnglish
Title of host publication2016 IEEE International Conference on Cluster Computing, CLUSTER 2016
PublisherIEEE Computer Society
Pages 374-383
DOIs
Publication statusPublished - Sep 2016
Event2016 IEEE International Conference on Cluster Computing (CLUSTER) - Taipei, Taiwan, Province of China
Duration: 12 Sep 201616 Sep 2016

Conference

Conference2016 IEEE International Conference on Cluster Computing (CLUSTER)
CountryTaiwan, Province of China
CityTaipei
Period12/09/1616/09/16

Keywords

  • Stencil Computations
  • MapReduce
  • Temporal Locality
  • Tiling
  • Cache Hierarchy

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