Fractional harmonic distortion calculation using simplified 'reconciliation' model for a MOST operating in moderate inversion

I. M. Filanovsky, L. B. Oliveira, N. T. Tchamov

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The paper describes evaluation of the first, second and (with most attention to) third harmonics of the drain current in a MOS transistor operating in moderate inversion. The dependence of this current on the gate-source voltage is approximated using a simplified 'reconciliation' model developed by Y. Tsividis. Then, the drain current components depending exponentially on normalized signal voltage are calculated using modified Bessel functions. This approach indicates that the third harmonic has two 'sweet spots' (zero values) but the location of that one corresponding to moderate inversion changes with the signal amplitude. This change makes impossible application of this point for circuit linearization. The second 'sweet spot' is corresponding practically to the strong inversion, and may be used for this purpose. The results of proposed calculation method are compared with that using the traditional approach, for example, Taylor series expansion of the drain current expression for small signal. The traditional method misses the above described, for moderate inversion, detrimental effect of signal amplitude or even loses completely the presence of these spots.

Original languageEnglish
Title of host publication2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages755-758
Number of pages4
Volume2017-August
ISBN (Electronic)9781509063895
DOIs
Publication statusPublished - 2017
Event60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017 - Boston, United States
Duration: 6 Aug 20179 Aug 2017

Conference

Conference60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017
CountryUnited States
CityBoston
Period6/08/179/08/17

Fingerprint

Drain current
Harmonic distortion
Bessel functions
Taylor series
Electric potential
MOSFET devices
Linearization
Networks (circuits)

Keywords

  • Distortion harmonics
  • Linearization
  • Moderate inversion
  • MOS transistor model
  • Strong inversion

Cite this

Filanovsky, I. M., Oliveira, L. B., & Tchamov, N. T. (2017). Fractional harmonic distortion calculation using simplified 'reconciliation' model for a MOST operating in moderate inversion. In 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017 (Vol. 2017-August, pp. 755-758). [8053033] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/MWSCAS.2017.8053033
Filanovsky, I. M. ; Oliveira, L. B. ; Tchamov, N. T. / Fractional harmonic distortion calculation using simplified 'reconciliation' model for a MOST operating in moderate inversion. 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017. Vol. 2017-August Institute of Electrical and Electronics Engineers Inc., 2017. pp. 755-758
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abstract = "The paper describes evaluation of the first, second and (with most attention to) third harmonics of the drain current in a MOS transistor operating in moderate inversion. The dependence of this current on the gate-source voltage is approximated using a simplified 'reconciliation' model developed by Y. Tsividis. Then, the drain current components depending exponentially on normalized signal voltage are calculated using modified Bessel functions. This approach indicates that the third harmonic has two 'sweet spots' (zero values) but the location of that one corresponding to moderate inversion changes with the signal amplitude. This change makes impossible application of this point for circuit linearization. The second 'sweet spot' is corresponding practically to the strong inversion, and may be used for this purpose. The results of proposed calculation method are compared with that using the traditional approach, for example, Taylor series expansion of the drain current expression for small signal. The traditional method misses the above described, for moderate inversion, detrimental effect of signal amplitude or even loses completely the presence of these spots.",
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Filanovsky, IM, Oliveira, LB & Tchamov, NT 2017, Fractional harmonic distortion calculation using simplified 'reconciliation' model for a MOST operating in moderate inversion. in 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017. vol. 2017-August, 8053033, Institute of Electrical and Electronics Engineers Inc., pp. 755-758, 60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, United States, 6/08/17. https://doi.org/10.1109/MWSCAS.2017.8053033

Fractional harmonic distortion calculation using simplified 'reconciliation' model for a MOST operating in moderate inversion. / Filanovsky, I. M.; Oliveira, L. B.; Tchamov, N. T.

2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017. Vol. 2017-August Institute of Electrical and Electronics Engineers Inc., 2017. p. 755-758 8053033.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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T1 - Fractional harmonic distortion calculation using simplified 'reconciliation' model for a MOST operating in moderate inversion

AU - Filanovsky, I. M.

AU - Oliveira, L. B.

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PY - 2017

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N2 - The paper describes evaluation of the first, second and (with most attention to) third harmonics of the drain current in a MOS transistor operating in moderate inversion. The dependence of this current on the gate-source voltage is approximated using a simplified 'reconciliation' model developed by Y. Tsividis. Then, the drain current components depending exponentially on normalized signal voltage are calculated using modified Bessel functions. This approach indicates that the third harmonic has two 'sweet spots' (zero values) but the location of that one corresponding to moderate inversion changes with the signal amplitude. This change makes impossible application of this point for circuit linearization. The second 'sweet spot' is corresponding practically to the strong inversion, and may be used for this purpose. The results of proposed calculation method are compared with that using the traditional approach, for example, Taylor series expansion of the drain current expression for small signal. The traditional method misses the above described, for moderate inversion, detrimental effect of signal amplitude or even loses completely the presence of these spots.

AB - The paper describes evaluation of the first, second and (with most attention to) third harmonics of the drain current in a MOS transistor operating in moderate inversion. The dependence of this current on the gate-source voltage is approximated using a simplified 'reconciliation' model developed by Y. Tsividis. Then, the drain current components depending exponentially on normalized signal voltage are calculated using modified Bessel functions. This approach indicates that the third harmonic has two 'sweet spots' (zero values) but the location of that one corresponding to moderate inversion changes with the signal amplitude. This change makes impossible application of this point for circuit linearization. The second 'sweet spot' is corresponding practically to the strong inversion, and may be used for this purpose. The results of proposed calculation method are compared with that using the traditional approach, for example, Taylor series expansion of the drain current expression for small signal. The traditional method misses the above described, for moderate inversion, detrimental effect of signal amplitude or even loses completely the presence of these spots.

KW - Distortion harmonics

KW - Linearization

KW - Moderate inversion

KW - MOS transistor model

KW - Strong inversion

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Filanovsky IM, Oliveira LB, Tchamov NT. Fractional harmonic distortion calculation using simplified 'reconciliation' model for a MOST operating in moderate inversion. In 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017. Vol. 2017-August. Institute of Electrical and Electronics Engineers Inc. 2017. p. 755-758. 8053033 https://doi.org/10.1109/MWSCAS.2017.8053033