Design of Improved Rail-to-Rail Low-Distortion and Low-Stress Switches in Advanced CMOS Technologies

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Abstract

This paper describes the efficient design of improved switch-linearization control circuits to drive CMOS switches when very low distortions are targeted. Besides better area efficiency, since no charge-pump circuit is required, the described circuit has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. Exhaustive corner simulation results of a practical sample-and-hold circuit show that, using the proposed circuit, linearity/distortion levels above 12-bits can be reached over the entire Nyquist band.
Original languageUnknown
Title of host publicationIEEE International Conference on Electronics, Circuits and Systems
Pages218-221
DOIs
Publication statusPublished - 1 Jan 2007
Event14th IEEE International Conference on Electronics, Circuits and Systems -
Duration: 1 Jan 2007 → …

Conference

Conference14th IEEE International Conference on Electronics, Circuits and Systems
Period1/01/07 → …

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