@inproceedings{2b20d20413a14d78a13fb33124faaae4,
title = "Design of a Ring-Amplifier Robust Against PVT Variations in Deep-Nanoscale FinFET CMOS",
abstract = "This paper describes the design and the electrical simulation results, at device level, of a proposed ring-Amplifier (RINGAMP) for industrial applications. The proposed topology has been fairly compared with other topologies presented in literature, showing better static (open-loop DC gain with less variability), dynamic performance (both, SNR and THD) and robustness against PVT corners and presenting a faster response. The simulated key performance parameters demonstrate to be compatible with the required specifications for a residue amplifier to be readily employed in the context of a 10-bit high-speed two-stage pipeline ADC. ",
keywords = "FinFET CMOS, Multi-Stage Pipeline ADCs, Residue-Amplifier, Ring-Amplifier, RINGAMP",
author = "Jo{\~a}o Xavier and Pedro Barquinha and Jo{\~a}o Goes",
note = "Funding Information: info:eu-repo/grantAgreement/FCT/6817 - DCRRNI ID/UIDB%2F50025%2F2020/PT# info:eu-repo/grantAgreement/FCT/3599-PPCDT/PCIF%2FSSI%2F0102%2F2017/PT# This work was mainly supported by XILINX, Dublin, Ireland and, in a smaller part, by the Portuguese Foundation for Science and Technology (FCT/MCTES) under PEST/OE/EEI/UI0066/2015 (PEST/CTS/UNINOVA). Publisher Copyright: {\textcopyright} 2021 IEEE.; 36th Conference on Design of Circuits and Integrated Systems, DCIS 2021 ; Conference date: 24-11-2021 Through 26-11-2021",
year = "2021",
doi = "10.1109/DCIS53048.2021.9666185",
language = "English",
series = "Conference on Design of Circuits and Integrated Systems DCIS",
publisher = "Institute of Electrical and Electronics Engineers (IEEE)",
pages = "11--15",
booktitle = "36th Conference on Design of Circuits and Integrated Systems, DCIS 2021",
address = "United States",
}