Abstract
In this paper we present a dynamic entropy generator based on the oscillator jitter, which uses a self-biasing technique to minimize process, voltage, and temperature (PVT) variations. The proposed circuit has the advantage of its intrinsic robustness due to self-biasing design, which eliminates the need of additional calibration steps and simplifies the circuit topology, with a negligible impact in area and power consumption. A frequency deviation below 15 % and a maximum jitter difference of 32 % under PVT variations, is obtained, in a 28 nm CMOS technology circuit prototype. For validation of the proposed circuit technique the IC prototype is compared with a standard ring oscillator and with traditional calibration techniques.
Original language | English |
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Title of host publication | PRIME 2023 |
Subtitle of host publication | 18th International Conference on Ph.D Research in Microelectronics and Electronics, Proceedings |
Place of Publication | Massachusetts |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Pages | 225-228 |
Number of pages | 4 |
ISBN (Electronic) | 979-8-3503-0319-3 |
ISBN (Print) | 979-8-3503-0321-6 |
DOIs | |
Publication status | Published - 2023 |
Event | 18th International Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2023 - Valencia, Spain Duration: 18 Jun 2023 → 21 Jun 2023 |
Conference
Conference | 18th International Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2023 |
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Country/Territory | Spain |
City | Valencia |
Period | 18/06/23 → 21/06/23 |
Keywords
- Entropy source
- PVT variations
- Ring oscillator
- Security
- Self-bias circuit
- TRNG