Design of a 10-bit 40 MS/s pipelined ADC using 1.5-bit with current-mode reference shifting

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a 1.5-bit MDAC circuit to be used in pipeline ADCs which employs a switched-current source to perform the reference shifting of the MDAC (the 1.5-bit digital-to-analog function). In the proposed circuit, the two single-ended reference voltage sources that are traditionally used (VREFP and VREFN), are replaced by a switched-current source. To evaluate and compare the performance of the proposed circuit, two 10-bit 40 MS/s ADCs, one using the traditional switched-capacitor (SC) MDAC and the other using the proposed MDAC, are designed. Simulation results show that the performance of the ADC with the proposed MDAC is enhanced since the power needed for the current sources is smaller than the power supplied by the reference voltage sources. Moreover, the proposed circuit does not require any reference voltage buffer, which can be difficult to design with relatively low power dissipation
Original languageUnknown
Title of host publicationProceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)
Pages216-220
Publication statusPublished - 1 Jan 2011
EventMixed Design of Integrated Circuits and Systems (MIXDES), 2011 -
Duration: 1 Jan 2011 → …

Conference

ConferenceMixed Design of Integrated Circuits and Systems (MIXDES), 2011
Period1/01/11 → …

Cite this

Goes, J. C. D. P., Paulino, N. F. S. V., & DEE Group Author (2011). Design of a 10-bit 40 MS/s pipelined ADC using 1.5-bit with current-mode reference shifting. In Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES) (pp. 216-220)