Analog-to-Digital Converters with Embedded IF Mixing Using Variable Reference Voltages

Nuno Pereira; João Carlos da Palma Goes; Luís Augusto Bica Gomes de Oliveira; Rui Miguel Henriques Dias Morgado Dinis

doi:10.1109/ISCAS.2014.6865072

Analog-to-Digital Converters with Embedded IF Mixing Using Variable Reference Voltages

Nuno Pereira, João Carlos da Palma Goes, Luís Augusto Bica Gomes de Oliveira, Rui Miguel Henriques Dias Morgado Dinis

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

This paper presents a new technique for the design of receiver architectures, based on the use of variable reference voltages in ADCs. The main goal is to improve the SNDR of a receiver chain when compared to traditional architectures like Low-IF or Subsampling, while performing down-conversion without the need of a Mixer block. The proposed technique takes advantage of the inherent capability of the ADC to perform the multiplication operation. High-level model simulations show that this technique is capable of improving the SNDR by about 5 dB (from 50 to 55 dB), while avoiding out-of-band noise aliasing, when compared to the referred techniques.

Original language	English
Title of host publication	Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Pages	89-92
DOIs	https://doi.org/10.1109/ISCAS.2014.6865072
Publication status	Published - 2014
Event	IEEE Int. Symp. Circuits and Systems (ISCAS’14) - Duration: 1 Jan 2014 → …

Conference

Conference	IEEE Int. Symp. Circuits and Systems (ISCAS’14)
Period	1/01/14 → …

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10.1109/ISCAS.2014.6865072

Cite this

@inproceedings{6fe0eb95e8184390a379c3ef27bd3661,

title = "Analog-to-Digital Converters with Embedded IF Mixing Using Variable Reference Voltages",

abstract = "This paper presents a new technique for the design of receiver architectures, based on the use of variable reference voltages in ADCs. The main goal is to improve the SNDR of a receiver chain when compared to traditional architectures like Low-IF or Subsampling, while performing down-conversion without the need of a Mixer block. The proposed technique takes advantage of the inherent capability of the ADC to perform the multiplication operation. High-level model simulations show that this technique is capable of improving the SNDR by about 5 dB (from 50 to 55 dB), while avoiding out-of-band noise aliasing, when compared to the referred techniques.",

author = "Nuno Pereira and Goes, {Jo{\~a}o Carlos da Palma} and Oliveira, {Lu{\'i}s Augusto Bica Gomes de} and Dinis, {Rui Miguel Henriques Dias Morgado}",

note = "This work was supported by national funds through FCT - Fundacao para a Ciencia e Tecnologia under project DISRUPTIVE (EXCL/EEIELC/ 0261/2012); IEEE Int. Symp. Circuits and Systems (ISCAS{\textquoteright}14) ; Conference date: 01-01-2014",

year = "2014",

doi = "10.1109/ISCAS.2014.6865072",

language = "English",

isbn = "978-1-4799-3431-7",

pages = "89--92",

booktitle = "Circuits and Systems (ISCAS), 2014 IEEE International Symposium on",

}

Analog-to-Digital Converters with Embedded IF Mixing Using Variable Reference Voltages. / Pereira, Nuno; Goes, João Carlos da Palma ; Oliveira, Luís Augusto Bica Gomes de et al.
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on. 2014. p. 89-92 6865072.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Analog-to-Digital Converters with Embedded IF Mixing Using Variable Reference Voltages

AU - Pereira, Nuno

AU - Goes, João Carlos da Palma

AU - Oliveira, Luís Augusto Bica Gomes de

AU - Dinis, Rui Miguel Henriques Dias Morgado

N1 - This work was supported by national funds through FCT - Fundacao para a Ciencia e Tecnologia under project DISRUPTIVE (EXCL/EEIELC/ 0261/2012)

PY - 2014

Y1 - 2014

N2 - This paper presents a new technique for the design of receiver architectures, based on the use of variable reference voltages in ADCs. The main goal is to improve the SNDR of a receiver chain when compared to traditional architectures like Low-IF or Subsampling, while performing down-conversion without the need of a Mixer block. The proposed technique takes advantage of the inherent capability of the ADC to perform the multiplication operation. High-level model simulations show that this technique is capable of improving the SNDR by about 5 dB (from 50 to 55 dB), while avoiding out-of-band noise aliasing, when compared to the referred techniques.

AB - This paper presents a new technique for the design of receiver architectures, based on the use of variable reference voltages in ADCs. The main goal is to improve the SNDR of a receiver chain when compared to traditional architectures like Low-IF or Subsampling, while performing down-conversion without the need of a Mixer block. The proposed technique takes advantage of the inherent capability of the ADC to perform the multiplication operation. High-level model simulations show that this technique is capable of improving the SNDR by about 5 dB (from 50 to 55 dB), while avoiding out-of-band noise aliasing, when compared to the referred techniques.

U2 - 10.1109/ISCAS.2014.6865072

DO - 10.1109/ISCAS.2014.6865072

M3 - Conference contribution

SN - 978-1-4799-3431-7

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EP - 92

BT - Circuits and Systems (ISCAS), 2014 IEEE International Symposium on

T2 - IEEE Int. Symp. Circuits and Systems (ISCAS’14)

Y2 - 1 January 2014

ER -

Analog-to-Digital Converters with Embedded IF Mixing Using Variable Reference Voltages

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