TY - JOUR
T1 - Analog Circuits With High-Gain Topologies Using a-GIZO TFTs on Glass
AU - Fortunato, Elvira Maria Correia
AU - Barquinha, Pedro Miguel Cândido
AU - Martins, Rodrigo Ferrão de Paiva
AU - Bahubalindruni, Pydi Ganga
AU - Silva, Bruno
AU - Tavares, Vitor Grade
AU - Cardoso, Nuno
AU - De Oliveira, Pedro Guedes
N1 - FCT9 - CMU-PT/SIA/0005/2009; (FCOMP-01-0124-FEDER-013070) PEST-C/CTM/LA0025/2013-14 ; BD/62678/2009 ;
European Research Council through the Advanced Grant INVISIBLE - ERC-2008-AdG 228144.
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PY - 2015
Y1 - 2015
N2 - This paper presents analog building blocks that find potential applications in display panels. A buffer (sourcefollower), subtractor, adder and a high-gain amplifier, employing only n-type enhancement amorphous Gallium-Indium- Zinc-Oxide thin-film transistors (a-GIZO TFTs), were designed, simulated, fabricated and characterized. Circuit simulations were carried out using a neural model developed in-house from the measured characteristics of the transistors. The adder-subtractor circuit presents a power consumption of 0.26mW, and the amplifier presents a gain of 34 dB and a power consumption of 0.576mW, with a load of 10M //16 pF. To the authors knowledge, this is the highest gain amplifier with a-GIZO TFT technology till date. Simulation results are in agreement with the measured circuit response.
AB - This paper presents analog building blocks that find potential applications in display panels. A buffer (sourcefollower), subtractor, adder and a high-gain amplifier, employing only n-type enhancement amorphous Gallium-Indium- Zinc-Oxide thin-film transistors (a-GIZO TFTs), were designed, simulated, fabricated and characterized. Circuit simulations were carried out using a neural model developed in-house from the measured characteristics of the transistors. The adder-subtractor circuit presents a power consumption of 0.26mW, and the amplifier presents a gain of 34 dB and a power consumption of 0.576mW, with a load of 10M //16 pF. To the authors knowledge, this is the highest gain amplifier with a-GIZO TFT technology till date. Simulation results are in agreement with the measured circuit response.
KW - neural modeling
KW - Analog circuits
KW - a-GIZO TFT
KW - Analog circuits
KW - a-GIZO TFT
KW - neural modeling
U2 - 10.1109/JDT.2014.2378058
DO - 10.1109/JDT.2014.2378058
M3 - Article
SN - 1551-319X
VL - 11
SP - 547
EP - 553
JO - Journal Of Display Technology
JF - Journal Of Display Technology
IS - 6
ER -