An analogue multiplier using carbon nanotube field-effect transistor technology

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Abstract

The endeavor to overcome problems of complementary metal oxide semiconductor technology (CMOS) makes the advent of carbon nanotube field-effect transistor (CNTFET). Improvement of carbon nanotube field-effect transistor structure leads to higher mobility and electrostatics of gate electrons. Therefore, many analog circuits are now designed based on carbon nanotube field-effect transistor technology. This paper presents a low power current mode four-quadrant analog multiplier based on CNTFET and CMOS technologies. All simulations were done with the synopsys Hspice simulator using 32 nm CNTFET model from Stanford University and 32 nm CMOS from PTM library at a supply voltage of 3.3 V. It was shown that the simulation of a multiplier based on carbon nanotube field-effect transistor technology performs better than a multiplier based on CMOS technology.

Original languageEnglish
Article number04022
JournalJournal of Nano- and Electronic Physics
Volume11
Issue number4
DOIs
Publication statusPublished - 2019

Keywords

  • Analog multiplier
  • Carbon nanotube field-effect transistor
  • Low power
  • Single-walled CNT

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