A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications

Nuno Filipe Silva Veríssimo Paulino

doi:10.1007/978-3-642-37291-9_47

A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications

Nuno Filipe Silva Veríssimo Paulino

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

A voltage limiter circuit for indoor light energy harvesting applications is presented. This circuit is a part of a bigger system, whose function is to harvest indoor light energy, process it and store it, so that it can be used at a later time. This processing consists on maximum power point tracking (MPPT) and stepping-up, of the voltage from the photovoltaic (PV) harvester cell. The circuit here described, ensures that even under strong illumination, the generated voltage will not exceed the limit allowed by the technology, avoiding the degradation, or destruction, of the integrated die. A prototype of the limiter circuit was designed in a 130 nm CMOS technology. The layout of the circuit has a total area of 23414 mu m(2). Simulation results, using Spectre, are presented.

Original language	English
Title of host publication	Technological Innovation for the Internet of Things
Pages	441-448
Number of pages	8
DOIs	https://doi.org/10.1007/978-3-642-37291-9_47
Publication status	Published - 2013
Event	4th IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2013 - Costa de Caparica, Portugal Duration: 15 Apr 2013 → 17 Apr 2013

Conference

Conference	4th IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2013
Country/Territory	Portugal
City	Costa de Caparica
Period	15/04/13 → 17/04/13

Keywords

CMOS integrated circuits
Energy harvesting
Voltage limiters
Voltage reference circuits

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1007/978-3-642-37291-9_47

Cite this

@inproceedings{80fc6538241a48569e3f77bc17d77cd6,

title = "A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications",

abstract = "A voltage limiter circuit for indoor light energy harvesting applications is presented. This circuit is a part of a bigger system, whose function is to harvest indoor light energy, process it and store it, so that it can be used at a later time. This processing consists on maximum power point tracking (MPPT) and stepping-up, of the voltage from the photovoltaic (PV) harvester cell. The circuit here described, ensures that even under strong illumination, the generated voltage will not exceed the limit allowed by the technology, avoiding the degradation, or destruction, of the integrated die. A prototype of the limiter circuit was designed in a 130 nm CMOS technology. The layout of the circuit has a total area of 23414 mu m(2). Simulation results, using Spectre, are presented.",

keywords = "CMOS integrated circuits, Energy harvesting, Voltage limiters, Voltage reference circuits",

author = "Paulino, {Nuno Filipe Silva Ver{\'i}ssimo}",

note = "Sem PDF.; 4th IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2013 ; Conference date: 15-04-2013 Through 17-04-2013",

year = "2013",

doi = "10.1007/978-3-642-37291-9_47",

language = "English",

pages = "441--448",

booktitle = "Technological Innovation for the Internet of Things",

}

TY - GEN

T1 - A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications

AU - Paulino, Nuno Filipe Silva Veríssimo

N1 - Sem PDF.

PY - 2013

Y1 - 2013

N2 - A voltage limiter circuit for indoor light energy harvesting applications is presented. This circuit is a part of a bigger system, whose function is to harvest indoor light energy, process it and store it, so that it can be used at a later time. This processing consists on maximum power point tracking (MPPT) and stepping-up, of the voltage from the photovoltaic (PV) harvester cell. The circuit here described, ensures that even under strong illumination, the generated voltage will not exceed the limit allowed by the technology, avoiding the degradation, or destruction, of the integrated die. A prototype of the limiter circuit was designed in a 130 nm CMOS technology. The layout of the circuit has a total area of 23414 mu m(2). Simulation results, using Spectre, are presented.

AB - A voltage limiter circuit for indoor light energy harvesting applications is presented. This circuit is a part of a bigger system, whose function is to harvest indoor light energy, process it and store it, so that it can be used at a later time. This processing consists on maximum power point tracking (MPPT) and stepping-up, of the voltage from the photovoltaic (PV) harvester cell. The circuit here described, ensures that even under strong illumination, the generated voltage will not exceed the limit allowed by the technology, avoiding the degradation, or destruction, of the integrated die. A prototype of the limiter circuit was designed in a 130 nm CMOS technology. The layout of the circuit has a total area of 23414 mu m(2). Simulation results, using Spectre, are presented.

KW - CMOS integrated circuits

KW - Energy harvesting

KW - Voltage limiters

KW - Voltage reference circuits

U2 - 10.1007/978-3-642-37291-9_47

DO - 10.1007/978-3-642-37291-9_47

M3 - Conference contribution

SP - 441

EP - 448

BT - Technological Innovation for the Internet of Things

T2 - 4th IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2013

Y2 - 15 April 2013 through 17 April 2013

ER -

A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications

Abstract

Conference

Keywords

UN SDGs

Access to Document

Fingerprint

Cite this