A voltage-combiners-biased amplifier with enhanced gain and speed using current starving

R. Povoa, N. Lourenço, N. Horta, J. Goes

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

In this paper, the current starving technique is applied to a voltage-combiners-biased symmetrical CMOS Operational Transconductance Amplifier (OTA). The proposed topology upgrade enhances the gain of the conventional topology, improves the settling time by means of enhancing its gain-bandwidth product and highly improves its energy efficiency. Simulation results of a properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 60 dB can be achieved together with a high energy efficiency (a figure-of-merit of 2200 MHz×pF/mA has been reached). The circuit was designed using a standard 130 nm CMOS technology and drains less than 0.5 mA from a 3.3 V power supply.

Original languageEnglish
Title of host publication2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages2069-2072
Number of pages4
Volume2015-July
ISBN (Electronic)978-1-4799-8391-9
DOIs
Publication statusPublished - 1 Jan 2015
EventIEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal
Duration: 24 May 201527 May 2015

Conference

ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2015
CountryPortugal
CityLisbon
Period24/05/1527/05/15

Keywords

  • Common-Drain
  • Common-Source
  • Current Starving
  • Design Automation
  • Energy-Efficiency
  • Multi-Constraint
  • Multi-Objective
  • Optimization
  • OTA
  • Voltage-Combiners

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