A voltage-combiners-biased amplifier with enhanced gain and speed using current starving

R. Povoa; N. Lourenço; N. Horta; J. Goes

doi:10.1109/ISCAS.2015.7169085

A voltage-combiners-biased amplifier with enhanced gain and speed using current starving

R. Povoa, N. Lourenço, N. Horta, J. Goes

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Citations (Scopus)

Abstract

In this paper, the current starving technique is applied to a voltage-combiners-biased symmetrical CMOS Operational Transconductance Amplifier (OTA). The proposed topology upgrade enhances the gain of the conventional topology, improves the settling time by means of enhancing its gain-bandwidth product and highly improves its energy efficiency. Simulation results of a properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 60 dB can be achieved together with a high energy efficiency (a figure-of-merit of 2200 MHz×pF/mA has been reached). The circuit was designed using a standard 130 nm CMOS technology and drains less than 0.5 mA from a 3.3 V power supply.

Original language	English
Title of host publication	2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	2069-2072
Number of pages	4
Volume	2015-July
ISBN (Electronic)	978-1-4799-8391-9
DOIs	https://doi.org/10.1109/ISCAS.2015.7169085
Publication status	Published - 1 Jan 2015
Event	IEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal Duration: 24 May 2015 → 27 May 2015

Conference

Conference	IEEE International Symposium on Circuits and Systems, ISCAS 2015
Country/Territory	Portugal
City	Lisbon
Period	24/05/15 → 27/05/15

Keywords

Common-Drain
Common-Source
Current Starving
Design Automation
Energy-Efficiency
Multi-Constraint
Multi-Objective
Optimization
OTA
Voltage-Combiners

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/ISCAS.2015.7169085

Cite this

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title = "A voltage-combiners-biased amplifier with enhanced gain and speed using current starving",

abstract = "In this paper, the current starving technique is applied to a voltage-combiners-biased symmetrical CMOS Operational Transconductance Amplifier (OTA). The proposed topology upgrade enhances the gain of the conventional topology, improves the settling time by means of enhancing its gain-bandwidth product and highly improves its energy efficiency. Simulation results of a properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 60 dB can be achieved together with a high energy efficiency (a figure-of-merit of 2200 MHz×pF/mA has been reached). The circuit was designed using a standard 130 nm CMOS technology and drains less than 0.5 mA from a 3.3 V power supply.",

keywords = "Common-Drain, Common-Source, Current Starving, Design Automation, Energy-Efficiency, Multi-Constraint, Multi-Objective, Optimization, OTA, Voltage-Combiners",

author = "R. Povoa and N. Louren{\c c}o and N. Horta and J. Goes",

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Povoa, R, Lourenço, N, Horta, N & Goes, J 2015, A voltage-combiners-biased amplifier with enhanced gain and speed using current starving. in 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. vol. 2015-July, 7169085, Institute of Electrical and Electronics Engineers (IEEE), pp. 2069-2072, IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, 24/05/15. https://doi.org/10.1109/ISCAS.2015.7169085

A voltage-combiners-biased amplifier with enhanced gain and speed using current starving. / Povoa, R.; Lourenço, N.; Horta, N. et al.
2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. Vol. 2015-July Institute of Electrical and Electronics Engineers (IEEE), 2015. p. 2069-2072 7169085.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A voltage-combiners-biased amplifier with enhanced gain and speed using current starving

AU - Povoa, R.

AU - Lourenço, N.

AU - Horta, N.

AU - Goes, J.

N1 - sem pdf conforme despacho.

PY - 2015/1/1

Y1 - 2015/1/1

N2 - In this paper, the current starving technique is applied to a voltage-combiners-biased symmetrical CMOS Operational Transconductance Amplifier (OTA). The proposed topology upgrade enhances the gain of the conventional topology, improves the settling time by means of enhancing its gain-bandwidth product and highly improves its energy efficiency. Simulation results of a properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 60 dB can be achieved together with a high energy efficiency (a figure-of-merit of 2200 MHz×pF/mA has been reached). The circuit was designed using a standard 130 nm CMOS technology and drains less than 0.5 mA from a 3.3 V power supply.

AB - In this paper, the current starving technique is applied to a voltage-combiners-biased symmetrical CMOS Operational Transconductance Amplifier (OTA). The proposed topology upgrade enhances the gain of the conventional topology, improves the settling time by means of enhancing its gain-bandwidth product and highly improves its energy efficiency. Simulation results of a properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 60 dB can be achieved together with a high energy efficiency (a figure-of-merit of 2200 MHz×pF/mA has been reached). The circuit was designed using a standard 130 nm CMOS technology and drains less than 0.5 mA from a 3.3 V power supply.

KW - Common-Drain

KW - Common-Source

KW - Current Starving

KW - Design Automation

KW - Energy-Efficiency

KW - Multi-Constraint

KW - Multi-Objective

KW - Optimization

KW - OTA

KW - Voltage-Combiners

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M3 - Conference contribution

AN - SCOPUS:84946217862

VL - 2015-July

SP - 2069

EP - 2072

BT - 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015

PB - Institute of Electrical and Electronics Engineers (IEEE)

T2 - IEEE International Symposium on Circuits and Systems, ISCAS 2015

Y2 - 24 May 2015 through 27 May 2015

ER -

A voltage-combiners-biased amplifier with enhanced gain and speed using current starving

Abstract

Conference

Keywords

UN SDGs

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