A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under positive gate bias stress

K. M. Niang, P. M. C. Barquinha, R. F. P. Martins, B. Cobb, M. J. Powell, A. J. Flewitt

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Abstract

Thin film transistors (TFTs) employing an amorphous indium gallium zinc oxide (a-IGZO) channel layer exhibit a positive shift in the threshold voltage under the application of positive gate bias stress (PBS). The time and temperature dependence of the threshold voltage shift was measured and analysed using the thermalization energy concept. The peak energy barrier to defect conversion is extracted to be 0.75 eV and the attempt-to-escape frequency is extracted to be 107 s-1. These values are in remarkable agreement with measurements in a-IGZO TFTs under negative gate bias illumination stress (NBIS) reported recently (Flewitt and Powell, J. Appl. Phys. 115, 134501 (2014)). This suggests that the same physical process is responsible for both PBS and NBIS, and supports the oxygen vacancy defect migration model that the authors have previously proposed.

Original languageEnglish
Article number093505
JournalApplied Physics Letters
Volume108
Issue number9
DOIs
Publication statusPublished - 29 Feb 2016

Keywords

  • Thin film transistors
  • Gallium
  • Gallium zinc

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