A switched-capacitor biquad using a simple quasi-unity gain amplifier

Nuno Filipe Silva Veríssimo Paulino; João Carlos da Palma Goes

doi:10.1109/ISCAS.2013.6572223

A switched-capacitor biquad using a simple quasi-unity gain amplifier

Nuno Filipe Silva Veríssimo Paulino, João Carlos da Palma Goes

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

6 Citations (Scopus)

Abstract

This paper presents a SC biquad using a simple quasi-unity gain amplifier. In sub-nanometer CMOS technologies the intrinsic gain of the transistors is low, this increases the difficulty of designing high gain amplifiers. The proposed SC filter is based on the Sallen-Key biquad and it requires only a simple low gain amplifier. A differential filter circuit, including a suitable low gain amplifier based on a fully-differential voltage-combiner is presented. The correct functionality of this circuit is validated through electrical simulations of a cascaded sixth order filter. These simulations show that for a clock frequency of 100 MHz, the frequency response of the circuit is very similar to the one of the prototype filter, with only a relative error of 1.1% in the attenuation value at the cutoff frequency.

Original language	Unknown
Title of host publication	Circuits and Systems (ISCAS)
Pages	1841-1844
DOIs	https://doi.org/10.1109/ISCAS.2013.6572223
Publication status	Published - 1 Jan 2013
Event	2013 IEEE International Symposium on Circuits and Systems (ISCAS) - Duration: 1 Jan 2013 → …

Conference

Conference	2013 IEEE International Symposium on Circuits and Systems (ISCAS)
Period	1/01/13 → …

Access to Document

10.1109/ISCAS.2013.6572223

Cite this

@inproceedings{eec9281b0bbd44f99b1ea669f7184150,

title = "A switched-capacitor biquad using a simple quasi-unity gain amplifier",

abstract = "This paper presents a SC biquad using a simple quasi-unity gain amplifier. In sub-nanometer CMOS technologies the intrinsic gain of the transistors is low, this increases the difficulty of designing high gain amplifiers. The proposed SC filter is based on the Sallen-Key biquad and it requires only a simple low gain amplifier. A differential filter circuit, including a suitable low gain amplifier based on a fully-differential voltage-combiner is presented. The correct functionality of this circuit is validated through electrical simulations of a cascaded sixth order filter. These simulations show that for a clock frequency of 100 MHz, the frequency response of the circuit is very similar to the one of the prototype filter, with only a relative error of 1.1% in the attenuation value at the cutoff frequency.",

keywords = "band-pass Sallen-Key, Analog circuits, switched-capacitor circuits, voltage-combiner amplifier",

author = "Paulino, {Nuno Filipe Silva Ver{\'i}ssimo} and Goes, {Jo{\~a}o Carlos da Palma}",

note = "Sem pdf conforme despacho.; 2013 IEEE International Symposium on Circuits and Systems (ISCAS) ; Conference date: 01-01-2013",

year = "2013",

month = jan,

day = "1",

doi = "10.1109/ISCAS.2013.6572223",

language = "Unknown",

isbn = "978-1-4673-5760-9",

pages = "1841--1844",

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TY - GEN

T1 - A switched-capacitor biquad using a simple quasi-unity gain amplifier

AU - Paulino, Nuno Filipe Silva Veríssimo

AU - Goes, João Carlos da Palma

N1 - Sem pdf conforme despacho.

PY - 2013/1/1

Y1 - 2013/1/1

N2 - This paper presents a SC biquad using a simple quasi-unity gain amplifier. In sub-nanometer CMOS technologies the intrinsic gain of the transistors is low, this increases the difficulty of designing high gain amplifiers. The proposed SC filter is based on the Sallen-Key biquad and it requires only a simple low gain amplifier. A differential filter circuit, including a suitable low gain amplifier based on a fully-differential voltage-combiner is presented. The correct functionality of this circuit is validated through electrical simulations of a cascaded sixth order filter. These simulations show that for a clock frequency of 100 MHz, the frequency response of the circuit is very similar to the one of the prototype filter, with only a relative error of 1.1% in the attenuation value at the cutoff frequency.

AB - This paper presents a SC biquad using a simple quasi-unity gain amplifier. In sub-nanometer CMOS technologies the intrinsic gain of the transistors is low, this increases the difficulty of designing high gain amplifiers. The proposed SC filter is based on the Sallen-Key biquad and it requires only a simple low gain amplifier. A differential filter circuit, including a suitable low gain amplifier based on a fully-differential voltage-combiner is presented. The correct functionality of this circuit is validated through electrical simulations of a cascaded sixth order filter. These simulations show that for a clock frequency of 100 MHz, the frequency response of the circuit is very similar to the one of the prototype filter, with only a relative error of 1.1% in the attenuation value at the cutoff frequency.

KW - band-pass Sallen-Key

KW - Analog circuits

KW - switched-capacitor circuits

KW - voltage-combiner amplifier

U2 - 10.1109/ISCAS.2013.6572223

DO - 10.1109/ISCAS.2013.6572223

M3 - Conference contribution

SN - 978-1-4673-5760-9

SP - 1841

EP - 1844

BT - Circuits and Systems (ISCAS)

T2 - 2013 IEEE International Symposium on Circuits and Systems (ISCAS)

Y2 - 1 January 2013

ER -