A self-biased ring oscillator with quadrature outputs operating at 600 MHz in a 130 nm CMOS technology

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Abstract

This paper presents a self-biased ring oscillator with quadrature outputs operating at 600 MHz. The proposed self-biased circuit presents low frequency oscillation sensitivity towards power supply and process variations, and simulations in a 130 nm CMOS technology, showing that the self-biased circuit achieves better results, what concerns phase noise and power dissipation, achieving 8 dB improvement in the FOM, when compared with the conventional ring oscillator based on current-starved inverters.

Original languageEnglish
Title of host publicationProceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011
Pages221-224
Number of pages4
Publication statusPublished - 4 Oct 2011
Event18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 - Gliwice, Poland
Duration: 16 Jun 201118 Jun 2011

Conference

Conference18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011
Country/TerritoryPoland
CityGliwice
Period16/06/1118/06/11

Keywords

  • CMOS oscillator
  • quadrature outputs
  • ring oscillator
  • self-biased inverters

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