Abstract
This paper presents a novel Delta Sigma circuit based on the implementation of discrete time filters using very incomplete settling. This approach allows building a Delta Sigma M with mostly dynamic elements thus reducing the power dissipation. A 2(nd) order Delta Sigma M architecture, using this technique, is presented and analyzed. High-level and transient noise electrical simulations prove the validity of the concept. Electrical simulations show that the Delta Sigma M achieves a peak SNDR of 74.0 dB, a peak SNR of 78.6 dB and a dynamic range of 82.4 dB for a signal with a bandwidth of 300 kHz, while dissipating 204 mu W from a 1.1 V power supply voltage, indicating that, a FOM of 174 dB can be reached.
| Original language | Unknown |
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| Title of host publication | Procedings of the International Symposium on Circuits and Systems (ISCAS), 2011 |
| Pages | 1367-1370 |
| Volume | 1 |
| ISBN (Electronic) | 978-1-4244-9472-9 |
| DOIs | |
| Publication status | Published - 1 Jan 2011 |
| Event | International Symposium on Circuits and Systems (ISCAS), 2011 - Duration: 1 Jan 2011 → … |
Conference
| Conference | International Symposium on Circuits and Systems (ISCAS), 2011 |
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| Period | 1/01/11 → … |