TY - GEN
T1 - A Parasitic Resistance Extraction Tool Leveraged by Image Processing
AU - Dias, Diogo
AU - Goes, João
AU - Costa, Tiago
N1 - Funding Information:
info:eu-repo/grantAgreement/FCT/6817 - DCRRNI ID/UIDB%2F00066%2F2020/PT#
This research work has been supported by XILINX Ireland and also by FEDER funds through National Funds provided by FCT - Fundac¸ão para a Ciência e a Tecnologia.
Publisher Copyright:
© 2022 IEEE.
PY - 2022/11/11
Y1 - 2022/11/11
N2 - Most academic and commercial tri-dimensional (3D) parasitic resistance extraction EDA/CAD tools rely on finite element methods (FEM) and are mainly suited to digital circuitry. In analog and mixed-signal (AMS) circuits, such as power converters and radio-frequency analog front-ends, the layout structures used for the metal interconnections become much more diversified and complex. This paper proposes an EDA/CAD tool, based on an innovative methodology for 3D parasitic resistance extraction, leveraged by image processing techniques and algorithms. Some practical examples are shown to demonstrate the attractiveness of the proposed tool. Moreover, since our tool efficiently works in the domains of 2D image processing, if an extensive database of layouts is provided and enough training is carried out, advanced deep-learning techniques can be straightforwardly employed, speeding up parasitic resistance extraction in highly complex AMS layouts.
AB - Most academic and commercial tri-dimensional (3D) parasitic resistance extraction EDA/CAD tools rely on finite element methods (FEM) and are mainly suited to digital circuitry. In analog and mixed-signal (AMS) circuits, such as power converters and radio-frequency analog front-ends, the layout structures used for the metal interconnections become much more diversified and complex. This paper proposes an EDA/CAD tool, based on an innovative methodology for 3D parasitic resistance extraction, leveraged by image processing techniques and algorithms. Some practical examples are shown to demonstrate the attractiveness of the proposed tool. Moreover, since our tool efficiently works in the domains of 2D image processing, if an extensive database of layouts is provided and enough training is carried out, advanced deep-learning techniques can be straightforwardly employed, speeding up parasitic resistance extraction in highly complex AMS layouts.
UR - http://www.scopus.com/inward/record.url?scp=85142526969&partnerID=8YFLogxK
U2 - 10.1109/ISCAS48785.2022.9937879
DO - 10.1109/ISCAS48785.2022.9937879
M3 - Conference contribution
AN - SCOPUS:85142526969
SN - 978-1-6654-8486-2
SN - 978-1-6654-8484-8
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1585
EP - 1589
BT - IEEE International Symposium on Circuits and Systems, ISCAS 2022
PB - Institute of Electrical and Electronics Engineers (IEEE)
T2 - 2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022
Y2 - 27 May 2022 through 1 June 2022
ER -