A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner

Somayeh Abdollahvand; Rui Manuel Leitão Santos-tavares; João Carlos da Palma Goes

doi:10.1007/978-3-642-37291-9_66

A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner

Somayeh Abdollahvand, Rui Manuel Leitão Santos-tavares, João Carlos da Palma Goes

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Citations (Scopus)

Abstract

This paper presents a new CMOS buffer circuit topology for radio-frequency (RF) applications based on a fully-differential voltage-combiner circuit, capable of operating at low-voltage. The proposed circuit uses a combination of common-source (CS) and common-drain (CD) devices. The simulation results show good levels of linearity and bandwidth. To improve total harmonic distortion (THD) a source degeneration technique is used. The proposed circuit has been designed in a 130nm logic CMOS technology and it achieves a simulated gain of 1.54 dB, a bandwidth of 1.14 GHz for a total power dissipation of 13.34 mW, when driving an RF active probe (with 0.8 pF in parallel with 200 kΩ).

Original language	Unknown
Title of host publication	IFIP Advances in Information and Communication Technology
Pages	611-618
ISBN (Electronic)	978-3-642-37291-9
DOIs	https://doi.org/10.1007/978-3-642-37291-9_66
Publication status	Published - 1 Jan 2013
Event	DoCEIS’13: 4th Doctoral Conference on Computing, Electrical and Industrial Systems - Duration: 1 Jan 2013 → …

Conference

Conference	DoCEIS’13: 4th Doctoral Conference on Computing, Electrical and Industrial Systems
Period	1/01/13 → …

Keywords

Buffer
CMOS
Common-drain
Common-source
Low-voltage
RF

Access to Document

10.1007/978-3-642-37291-9_66

Cite this

@inproceedings{6214d2676b6b472b910c9dd42fe08bf2,

title = "A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner",

abstract = "This paper presents a new CMOS buffer circuit topology for radio-frequency (RF) applications based on a fully-differential voltage-combiner circuit, capable of operating at low-voltage. The proposed circuit uses a combination of common-source (CS) and common-drain (CD) devices. The simulation results show good levels of linearity and bandwidth. To improve total harmonic distortion (THD) a source degeneration technique is used. The proposed circuit has been designed in a 130nm logic CMOS technology and it achieves a simulated gain of 1.54 dB, a bandwidth of 1.14 GHz for a total power dissipation of 13.34 mW, when driving an RF active probe (with 0.8 pF in parallel with 200 kΩ).",

keywords = "common-drain, RF, low-voltage, buffer, common-source, CMOS, Buffer, CMOS, Common-drain, Common-source, Low-voltage, RF",

author = "Somayeh Abdollahvand and Santos-tavares, {Rui Manuel Leit{\~a}o} and Goes, {Jo{\~a}o Carlos da Palma}",

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doi = "10.1007/978-3-642-37291-9_66",

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Abdollahvand, S, Santos-tavares, RML & Goes, JCDP 2013, A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner. in IFIP Advances in Information and Communication Technology., A067, pp. 611-618, DoCEIS’13: 4th Doctoral Conference on Computing, Electrical and Industrial Systems, 1/01/13. https://doi.org/10.1007/978-3-642-37291-9_66

A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner. / Abdollahvand, Somayeh; Santos-tavares, Rui Manuel Leitão ; Goes, João Carlos da Palma.
IFIP Advances in Information and Communication Technology. 2013. p. 611-618 A067.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - This paper presents a new CMOS buffer circuit topology for radio-frequency (RF) applications based on a fully-differential voltage-combiner circuit, capable of operating at low-voltage. The proposed circuit uses a combination of common-source (CS) and common-drain (CD) devices. The simulation results show good levels of linearity and bandwidth. To improve total harmonic distortion (THD) a source degeneration technique is used. The proposed circuit has been designed in a 130nm logic CMOS technology and it achieves a simulated gain of 1.54 dB, a bandwidth of 1.14 GHz for a total power dissipation of 13.34 mW, when driving an RF active probe (with 0.8 pF in parallel with 200 kΩ).

AB - This paper presents a new CMOS buffer circuit topology for radio-frequency (RF) applications based on a fully-differential voltage-combiner circuit, capable of operating at low-voltage. The proposed circuit uses a combination of common-source (CS) and common-drain (CD) devices. The simulation results show good levels of linearity and bandwidth. To improve total harmonic distortion (THD) a source degeneration technique is used. The proposed circuit has been designed in a 130nm logic CMOS technology and it achieves a simulated gain of 1.54 dB, a bandwidth of 1.14 GHz for a total power dissipation of 13.34 mW, when driving an RF active probe (with 0.8 pF in parallel with 200 kΩ).

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