A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper presents a new CMOS buffer circuit topology for radio-frequency (RF) applications based on a fully-differential voltage-combiner circuit, capable of operating at low-voltage. The proposed circuit uses a combination of common-source (CS) and common-drain (CD) devices. The simulation results show good levels of linearity and bandwidth. To improve total harmonic distortion (THD) a source degeneration technique is used. The proposed circuit has been designed in a 130nm logic CMOS technology and it achieves a simulated gain of 1.54 dB, a bandwidth of 1.14 GHz for a total power dissipation of 13.34 mW, when driving an RF active probe (with 0.8 pF in parallel with 200 kΩ).
Original languageUnknown
Title of host publicationIFIP Advances in Information and Communication Technology
Pages611-618
ISBN (Electronic)978-3-642-37291-9
DOIs
Publication statusPublished - 1 Jan 2013
EventDoCEIS’13: 4th Doctoral Conference on Computing, Electrical and Industrial Systems -
Duration: 1 Jan 2013 → …

Conference

ConferenceDoCEIS’13: 4th Doctoral Conference on Computing, Electrical and Industrial Systems
Period1/01/13 → …

Keywords

  • Buffer
  • CMOS
  • Common-drain
  • Common-source
  • Low-voltage
  • RF

Cite this