A hybrid current-mode passive second-order continuous-time ΣΔ modulator

Pawel Sniatala, Mariusz Naumowicz, Joao L.A. de Melo, Nuno Filipe Silva Veríssimo Paulino, João Carlos da Palma Goes

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

This paper describes the design of a current-mode, active-passive second-order, continuous-time Sigma-Delta Modulator(ΣΔM). The proposed ΣΔM uses a single continuous-time current-mode integrator combined with low-pass passive filter topology. The resulting circuit, designed in a 65 nm 1.2 V CMOS technology, has a bandwidth of 2 MHz for a clock frequency of 400 MHz. The electrical simulation results show that it achieves a maximum signal-to-noise-plus-distortion ratio (SNDR) of 60.7 dB and a dynamic range(DR) of 65 dB while dissipating 132 μW which corresponds to an efficiency of 37.3 fJ/conv. The proposed architecture allows to obtain the best compromise between power consumption and performance of the ADC.
Original languageEnglish
Title of host publicationMixed Design of Integrated Circuits & Systems (MIXDES), 2014 Proceedings of the 21st International Conference
Pages117 - 120
ISBN (Electronic)978-83-63578-04-6
DOIs
Publication statusPublished - 2014
Event21st International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES) -
Duration: 1 Jan 2014 → …

Conference

Conference21st International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES)
Period1/01/14 → …

Keywords

  • Current-mode
  • Sigma-delta modulator

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