TY - JOUR
T1 - A folded voltage-combiners biased amplifier for low voltage and high energy-efficiency applications
AU - Póvoa, Ricardo
AU - Lourenço, Nuno
AU - Martins, Ricardo M. F.
AU - Canelas, António
AU - Horta, Nuno C. G.
AU - Goes, João
N1 - This work was supported in part by the Fundacao para a Ciencia e Tecnologia under Grant SFRH/BD/103337/2014, Grant SFRH/BPD/104648/2014, and Grant SFRH/BPD/120009/2016, and in part by the Instituto de Telecomunicacoes under Project UID/EEA/50008/2019.
PY - 2020/2
Y1 - 2020/2
N2 - The topic of this brief is a single-stage amplifier biased by a doublet of voltage-combiners in a folded configuration, in order to be supplied by a power source of 1.2 V, maintaining proper dc biasing and avoiding the need of any device stacking. The topology has been automatically designed, optimized, and laid out, from sizing to layout level, using a layout-aware approach provided by the AIDA framework, a state-of-the-art analog IC design optimization framework. Experimental results prove that a gain of approximately 44 dB, together with a figure-of-merit higher than 1300 MHz × pF/mW are achievable using the proposed topology, with standard UMC 130 nm technology devices and a 1.2-V supply source. Finally, an extension to supply sources below nominal is explored, showing exciting results toward a future of high energy-efficiency amplifiers.
AB - The topic of this brief is a single-stage amplifier biased by a doublet of voltage-combiners in a folded configuration, in order to be supplied by a power source of 1.2 V, maintaining proper dc biasing and avoiding the need of any device stacking. The topology has been automatically designed, optimized, and laid out, from sizing to layout level, using a layout-aware approach provided by the AIDA framework, a state-of-the-art analog IC design optimization framework. Experimental results prove that a gain of approximately 44 dB, together with a figure-of-merit higher than 1300 MHz × pF/mW are achievable using the proposed topology, with standard UMC 130 nm technology devices and a 1.2-V supply source. Finally, an extension to supply sources below nominal is explored, showing exciting results toward a future of high energy-efficiency amplifiers.
KW - energy-efficiency
KW - Folded voltage-combiners
KW - gain improvement
KW - low-power
KW - low-voltage
KW - OTA
KW - single-stage
UR - http://www.scopus.com/inward/record.url?scp=85071531251&partnerID=8YFLogxK
U2 - 10.1109/TCSII.2019.2913083
DO - 10.1109/TCSII.2019.2913083
M3 - Article
AN - SCOPUS:85071531251
SN - 1549-7747
VL - 67
SP - 230
EP - 234
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
IS - 2
M1 - 8698300
ER -
