A CMOS self-biased fully differential amplifier is presented. Due to the self-biasing structure of the amplifier and its associated negative feedback, the amplifier is compensated to achieve low sensitivity to process, supply voltage and temperature (PVT) variations. The output common-mode voltage of the amplifier is adjusted through the same biasing voltages provided by the common-mode feedback (CMFB) circuit. The amplifier core is based on a simple structure that uses two CMOS inverters to amplify the input differential signal. Despite its simple structure, the proposed amplifier is attractive to a wide range of applications, specially those requiring low power and small silicon area. As two examples, a sample-and-hold circuit and a second order multi-bit sigma-delta modulator either employing the proposed amplifier are presented. Besides these application examples, a set of amplifier performance parameters is given.
|Title of host publication||IFIP Advances in Information and Communication Technology|
|Publication status||Published - 1 Jan 2010|
|Event||Doctoral Conference on Computing, Electrical and Industrial Systems - DoCEIS'10 - |
Duration: 1 Jan 2010 → …
|Conference||Doctoral Conference on Computing, Electrical and Industrial Systems - DoCEIS'10|
|Period||1/01/10 → …|