A CMOS Inverter-Based Self-biased Fully Differential Amplifier

João Carlos da Palma Goes; DEE Group Author

doi:10.1007/978-3-642-11628-5_60

A CMOS Inverter-Based Self-biased Fully Differential Amplifier

João Carlos da Palma Goes, DEE Group Author

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

A CMOS self-biased fully differential amplifier is presented. Due to the self-biasing structure of the amplifier and its associated negative feedback, the amplifier is compensated to achieve low sensitivity to process, supply voltage and temperature (PVT) variations. The output common-mode voltage of the amplifier is adjusted through the same biasing voltages provided by the common-mode feedback (CMFB) circuit. The amplifier core is based on a simple structure that uses two CMOS inverters to amplify the input differential signal. Despite its simple structure, the proposed amplifier is attractive to a wide range of applications, specially those requiring low power and small silicon area. As two examples, a sample-and-hold circuit and a second order multi-bit sigma-delta modulator either employing the proposed amplifier are presented. Besides these application examples, a set of amplifier performance parameters is given.

Original language	Unknown
Title of host publication	IFIP Advances in Information and Communication Technology
Pages	541-548
Volume	314
DOIs	https://doi.org/10.1007/978-3-642-11628-5_60
Publication status	Published - 1 Jan 2010
Event	Doctoral Conference on Computing, Electrical and Industrial Systems - DoCEIS'10 - Duration: 1 Jan 2010 → …

Conference

Conference	Doctoral Conference on Computing, Electrical and Industrial Systems - DoCEIS'10
Period	1/01/10 → …

Access to Document

10.1007/978-3-642-11628-5_60

http://oa.uninova.pt/2507/

Cite this

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title = "A CMOS Inverter-Based Self-biased Fully Differential Amplifier",

abstract = "A CMOS self-biased fully differential amplifier is presented. Due to the self-biasing structure of the amplifier and its associated negative feedback, the amplifier is compensated to achieve low sensitivity to process, supply voltage and temperature (PVT) variations. The output common-mode voltage of the amplifier is adjusted through the same biasing voltages provided by the common-mode feedback (CMFB) circuit. The amplifier core is based on a simple structure that uses two CMOS inverters to amplify the input differential signal. Despite its simple structure, the proposed amplifier is attractive to a wide range of applications, specially those requiring low power and small silicon area. As two examples, a sample-and-hold circuit and a second order multi-bit sigma-delta modulator either employing the proposed amplifier are presented. Besides these application examples, a set of amplifier performance parameters is given.",

author = "Goes, {Jo{\~a}o Carlos da Palma} and {DEE Group Author}",

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T1 - A CMOS Inverter-Based Self-biased Fully Differential Amplifier

AU - Goes, João Carlos da Palma

AU - DEE Group Author

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N2 - A CMOS self-biased fully differential amplifier is presented. Due to the self-biasing structure of the amplifier and its associated negative feedback, the amplifier is compensated to achieve low sensitivity to process, supply voltage and temperature (PVT) variations. The output common-mode voltage of the amplifier is adjusted through the same biasing voltages provided by the common-mode feedback (CMFB) circuit. The amplifier core is based on a simple structure that uses two CMOS inverters to amplify the input differential signal. Despite its simple structure, the proposed amplifier is attractive to a wide range of applications, specially those requiring low power and small silicon area. As two examples, a sample-and-hold circuit and a second order multi-bit sigma-delta modulator either employing the proposed amplifier are presented. Besides these application examples, a set of amplifier performance parameters is given.

AB - A CMOS self-biased fully differential amplifier is presented. Due to the self-biasing structure of the amplifier and its associated negative feedback, the amplifier is compensated to achieve low sensitivity to process, supply voltage and temperature (PVT) variations. The output common-mode voltage of the amplifier is adjusted through the same biasing voltages provided by the common-mode feedback (CMFB) circuit. The amplifier core is based on a simple structure that uses two CMOS inverters to amplify the input differential signal. Despite its simple structure, the proposed amplifier is attractive to a wide range of applications, specially those requiring low power and small silicon area. As two examples, a sample-and-hold circuit and a second order multi-bit sigma-delta modulator either employing the proposed amplifier are presented. Besides these application examples, a set of amplifier performance parameters is given.

U2 - 10.1007/978-3-642-11628-5_60

DO - 10.1007/978-3-642-11628-5_60

M3 - Conference contribution

SN - 978-3-642-11627-8

VL - 314

SP - 541

EP - 548

BT - IFIP Advances in Information and Communication Technology

Y2 - 1 January 2010

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