A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner

R. Póvoa; N. Lourenço; N. Horta; R. Santos-Tavares; J. Goes

doi:10.1109/ICECS.2014.7049972

A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner

R. Póvoa, N. Lourenço, N. Horta, R. Santos-Tavares, J. Goes

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Citations (Scopus)

Abstract

This paper presents the design and the electrical simulations of a single-stage amplifier with high energy-efficiency and enhanced DC gain without the need of using any cascode devices or any positive-feedback or feed-forward techniques. Instead, a fully-differential folded voltage-combiner block is used in replacement of the traditional tail current-source that is normally employed to bias the differential-pair. Simulation results of the properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 50 dB can be achieved, together with high energy efficiency. A simulated figure-of-merit above 2200 MHzxpF/mA has been reached. The circuit was designed using a 130 nm CMOS technology, draining approximately 0.2 mA from a 1.2 V power supply.

Original language	English
Title of host publication	2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	263-266
Number of pages	4
ISBN (Electronic)	978-1-4799-4242-8
DOIs	https://doi.org/10.1109/ICECS.2014.7049972
Publication status	Published - 25 Feb 2015
Event	2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 - Marseille, France Duration: 7 Dec 2014 → 10 Dec 2014

Conference

Conference	2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014
Country/Territory	France
City	Marseille
Period	7/12/14 → 10/12/14

Keywords

Electronic Design Automation
Energy-Efficiency
Fully-differential Voltage-Combiners
Multi-Objective Multi-Constraint Optimization
OTA
Single-Stage Amplifier

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/ICECS.2014.7049972

Cite this

Póvoa, R., Lourenço, N., Horta, N., Santos-Tavares, R., & Goes, J. (2015). A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. In 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 (pp. 263-266). Article 7049972 Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/ICECS.2014.7049972

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abstract = "This paper presents the design and the electrical simulations of a single-stage amplifier with high energy-efficiency and enhanced DC gain without the need of using any cascode devices or any positive-feedback or feed-forward techniques. Instead, a fully-differential folded voltage-combiner block is used in replacement of the traditional tail current-source that is normally employed to bias the differential-pair. Simulation results of the properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 50 dB can be achieved, together with high energy efficiency. A simulated figure-of-merit above 2200 MHzxpF/mA has been reached. The circuit was designed using a 130 nm CMOS technology, draining approximately 0.2 mA from a 1.2 V power supply.",

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Póvoa, R, Lourenço, N, Horta, N, Santos-Tavares, R & Goes, J 2015, A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. in 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014., 7049972, Institute of Electrical and Electronics Engineers (IEEE), pp. 263-266, 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014, Marseille, France, 7/12/14. https://doi.org/10.1109/ICECS.2014.7049972

A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. / Póvoa, R.; Lourenço, N.; Horta, N. et al.
2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014. Institute of Electrical and Electronics Engineers (IEEE), 2015. p. 263-266 7049972.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Póvoa, R.

AU - Lourenço, N.

AU - Horta, N.

AU - Santos-Tavares, R.

AU - Goes, J.

N1 - sem pdf conforme despacho

PY - 2015/2/25

Y1 - 2015/2/25

N2 - This paper presents the design and the electrical simulations of a single-stage amplifier with high energy-efficiency and enhanced DC gain without the need of using any cascode devices or any positive-feedback or feed-forward techniques. Instead, a fully-differential folded voltage-combiner block is used in replacement of the traditional tail current-source that is normally employed to bias the differential-pair. Simulation results of the properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 50 dB can be achieved, together with high energy efficiency. A simulated figure-of-merit above 2200 MHzxpF/mA has been reached. The circuit was designed using a 130 nm CMOS technology, draining approximately 0.2 mA from a 1.2 V power supply.

AB - This paper presents the design and the electrical simulations of a single-stage amplifier with high energy-efficiency and enhanced DC gain without the need of using any cascode devices or any positive-feedback or feed-forward techniques. Instead, a fully-differential folded voltage-combiner block is used in replacement of the traditional tail current-source that is normally employed to bias the differential-pair. Simulation results of the properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 50 dB can be achieved, together with high energy efficiency. A simulated figure-of-merit above 2200 MHzxpF/mA has been reached. The circuit was designed using a 130 nm CMOS technology, draining approximately 0.2 mA from a 1.2 V power supply.

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ER -

A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner

Abstract

Conference

Keywords

UN SDGs

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