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Abstract

ΔΣM performance can be improved by using MASH or SMASH structures to obtain higher-order noise shaping [1]. They have better stability than single-loop structures. The power dissipation of ΔΣMs can be reduced by using simpler amplifiers such as single-stage or inverter-based amplifiers [2]. Selecting a passive or active-passive ΔΣM architecture, where the processing gain of comparator is used in the feedback loop of the ΔΣM's filter [3], allows a reduction in the number of amplifiers and their gain. This solution is very appealing for deep-nanometer CMOS technologies, because a comparator can achieve large gain through positive feedback, which improves with faster transistors. This paper presents a passive-active CT 2-1 MASH ΔΣM using RC integrators, low-gain stages (~20dB) and simplified digital cancellation logic (DCL). The ΔΣM, clocked at 1GHz, achieves DR/SNR/SNDR of 77/76/72.2dB for input signal BW of 10MHz, while dissipating 1.57mW from a 1V supply.
Original languageEnglish
Title of host publication2016 IEEE International Solid-State Circuits Conference (ISSCC)
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages274-276
Number of pages3
ISBN (Print) 978-1-4673-9466-6
Publication statusPublished - 2016

Keywords

  • Multi-stage noise shaping
  • CMOS integrated circuits
  • Thermal noise
  • Capacitors
  • Optimization
  • Modulation
  • Solid state circuit

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    Nowacki, B., Paulino, N. F. S. V., & Goes, J. C. D. P. (2016). A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT SDM. In 2016 IEEE International Solid-State Circuits Conference (ISSCC) (pp. 274-276). Institute of Electrical and Electronics Engineers Inc..