15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM

Blazej Nowacki; Nuno Paulino; Joao Goes

doi:10.1109/ISSCC.2016.7418013

15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM

Blazej Nowacki, Nuno Paulino, Joao Goes

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

26 Citations (Scopus)

Abstract

ΔΣM performance can be improved by using MASH or SMASH structures to obtain higher-order noise shaping [1]. They have better stability than single-loop structures. The power dissipation of ΔΣMs can be reduced by using simpler amplifiers such as single-stage or inverter-based amplifiers [2]. Selecting a passive or active-passive ΔΣM architecture, where the processing gain of comparator is used in the feedback loop of the ΔΣM's filter [3], allows a reduction in the number of amplifiers and their gain. This solution is very appealing for deep-nanometer CMOS technologies, because a comparator can achieve large gain through positive feedback, which improves with faster transistors. This paper presents a passive-active CT 2-1 MASH ΔΣM using RC integrators, low-gain stages (∼20dB) and simplified digital cancellation logic (DCL). The ΔΣM, clocked at 1GHz, achieves DR/SNR/SNDR of 77/76/72.2dB for input signal BW of 10MHz, while dissipating 1.57mW from a 1V supply.

Original language	English
Title of host publication	2016 IEEE International Solid-State Circuits Conference (ISSCC 2016)
Editors	Laura C. Fujino
Place of Publication	New York, USA
Publisher	IEEE
Pages	274-275
Number of pages	2
ISBN (Electronic)	978-1-4673-9467-3
ISBN (Print)	978-1-4673-9466-6
DOIs	https://doi.org/10.1109/ISSCC.2016.7418013
Publication status	Published - 23 Feb 2016
Event	63rd IEEE International Solid-State Circuits Conference, ISSCC 2016 - San Francisco, United States Duration: 31 Jan 2016 → 4 Feb 2016

Publication series

Name	IEEE International Solid State Circuits Conference
Publisher	IEEE
Volume	59
ISSN (Print)	0193-6530

Conference

Conference	63rd IEEE International Solid-State Circuits Conference, ISSCC 2016
Country	United States
City	San Francisco
Period	31/01/16 → 4/02/16

Keywords

Feedback amplifiers

Access to Document

10.1109/ISSCC.2016.7418013

Link to publication in Scopus

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title = "15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM",

abstract = "ΔΣM performance can be improved by using MASH or SMASH structures to obtain higher-order noise shaping [1]. They have better stability than single-loop structures. The power dissipation of ΔΣMs can be reduced by using simpler amplifiers such as single-stage or inverter-based amplifiers [2]. Selecting a passive or active-passive ΔΣM architecture, where the processing gain of comparator is used in the feedback loop of the ΔΣM's filter [3], allows a reduction in the number of amplifiers and their gain. This solution is very appealing for deep-nanometer CMOS technologies, because a comparator can achieve large gain through positive feedback, which improves with faster transistors. This paper presents a passive-active CT 2-1 MASH ΔΣM using RC integrators, low-gain stages (∼20dB) and simplified digital cancellation logic (DCL). The ΔΣM, clocked at 1GHz, achieves DR/SNR/SNDR of 77/76/72.2dB for input signal BW of 10MHz, while dissipating 1.57mW from a 1V supply.",

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Nowacki, B, Paulino, N & Goes, J 2016, 15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM. in LC Fujino (ed.), 2016 IEEE International Solid-State Circuits Conference (ISSCC 2016)., 7418013, IEEE International Solid State Circuits Conference, vol. 59, IEEE, New York, USA, pp. 274-275, 63rd IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, United States, 31/01/16. https://doi.org/10.1109/ISSCC.2016.7418013

15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM. / Nowacki, Blazej; Paulino, Nuno ; Goes, Joao.

2016 IEEE International Solid-State Circuits Conference (ISSCC 2016). ed. / Laura C. Fujino. New York, USA : IEEE, 2016. p. 274-275 7418013 (IEEE International Solid State Circuits Conference; Vol. 59).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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